MT29F1G16ABBDAH4-IT:D Micron Semiconductor Products, MT29F1G16ABBDAH4-IT:D Datasheet - Page 7

• Manufacturer Part Number: MT29F1G16ABBDAH4-IT:D
• Manufacturer: Micron Semiconductor Products

Specifications of MT29F1G16ABBDAH4-IT:D

• Pack_quantity: 210
• Comm_code: 85423269
• Lead_time: 56
• Eccn: 3A991B1A

Micron Confidential and Proprietary
Preliminary
1Gb x8, x16: NAND Flash Memory
Features
Figure 50: OTP DATA PROGRAM Operation with RANDOM DATA INPUT (After Entering OTP Operation
Mode) ........................................................................................................................................................ 67
Figure 51: OTP DATA PROTECT Operation (After Entering OTP Protect Mode) ................................................ 68
Figure 52: OTP DATA READ .......................................................................................................................... 69
Figure 53: OTP DATA READ with RANDOM DATA READ Operation ................................................................ 70
Figure 54: Spare Area Mapping (x8) ................................................................................................................ 73
Figure 55: Spare Area Mapping (x16) .............................................................................................................. 74
Figure 56: RESET Operation .......................................................................................................................... 83
Figure 57: READ STATUS Cycle ...................................................................................................................... 83
Figure 58: READ PARAMETER PAGE .............................................................................................................. 84
Figure 59: READ PAGE .................................................................................................................................. 84
Figure 60: READ PAGE Operation with CE# “Don’t Care” ................................................................................ 85
Figure 61: RANDOM DATA READ .................................................................................................................. 86
Figure 62: READ PAGE CACHE SEQUENTIAL ................................................................................................. 87
Figure 63: READ PAGE CACHE RANDOM ...................................................................................................... 88
Figure 64: READ ID Operation ....................................................................................................................... 89
Figure 65: PROGRAM PAGE Operation ........................................................................................................... 89
Figure 66: PROGRAM PAGE Operation with CE# “Don’t Care” ........................................................................ 90
Figure 67: PROGRAM PAGE Operation with RANDOM DATA INPUT .............................................................. 90
Figure 68: PROGRAM PAGE CACHE ............................................................................................................... 91
Figure 69: PROGRAM PAGE CACHE Ending on 15h ........................................................................................ 91
Figure 70: INTERNAL DATA MOVE ................................................................................................................ 92
Figure 71: ERASE BLOCK Operation ............................................................................................................... 92
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m68a.pdf – Rev. D 06/10 EN
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