AK4646EN AKM [Asahi Kasei Microsystems], AK4646EN Datasheet - Page 24
AK4646EN
Manufacturer Part Number
AK4646EN
Description
Stereo CODEC with MIC/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4646EN.pdf
(79 pages)
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b) PLL reference clock: BICK or LRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits (Table 6).
The external clocks (MCKI, BICK and LRCK) should always be present whenever the ADC or DAC is in operation
(PMADL bit = “1”, PMADR bit = “1” or PMDAC bit = “1”). If these clocks are not provided, the AK4646 may draw
excess current and it is not possible to operate properly because utilizes dynamic refreshed logic internally. If the external
clocks are not present, the ADC and DAC should be in the power-down mode (PMADL=PMADR=PMDAC bits = “0”).
MS0557-E-02
Figure 14. PLL Slave Mode 2 (PLL Reference Clock: LRCK or BICK pin)
Figure 15 PLL Slave Mode 2 (PLL Reference Clock: LRCK pin)
AK4646
AK4646
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
32fs or 64fs
- 24 -
≥ 32fs
1fs
1fs
BCLK
LRCK
SDTI
SDTO
BCLK
LRCK
SDTI
SDTO
DSP or μP
DSP or μP
[AK4646]
2007/05
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