AK4646EN AKM [Asahi Kasei Microsystems], AK4646EN Datasheet - Page 75

• Manufacturer Part Number: AK4646EN
• Description: Stereo CODEC with MIC/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

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Master clock can be stopped when ADC and DAC are not used.
MS0557-E-02
External MCKI
External LRCK
External BICK
1. PLL Master Mode
2. PLL Slave Mode (LRCK or BICK pin)
(Addr:01H, D0)
(Addr:01H, D1)
(Addr:01H, D0)
Stop of Clock
<Example>
<Example>
PMPLL bit
PMPLL bit
MCKO bit
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop MCKO clock: MCKO bit = “1” → “0”
(3) Stop an external master clock.
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external BICK and LRCK clocks
"0" or "1"
Input
Input
Input
(1)
(1)
(2)
(3)
(2)
(2)
Figure 46. Clock Stopping Sequence (1)
Figure 47. Clock Stopping Sequence (2)
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Example:
Example
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format : MSB justified (ADC & DAC)
Audio I/F Format: MSB justified (ADC & DAC)
PLL Reference clock: BICK
BICK frequency: 64fs
(1) (2) Addr:01H, Data:08H
(3) Stop an external MCKI
(2) Stop the external clocks
(1) Addr:01H, Data:00H
[AK4646]
2007/05