92HD700DX5PRGXYYX IDT [Integrated Device Technology], 92HD700DX5PRGXYYX Datasheet - Page 36
92HD700DX5PRGXYYX
Manufacturer Part Number
92HD700DX5PRGXYYX
Description
10-CHANNEL HIGH DEFINITION AUDIO CODEC
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.92HD700DX5PRGXYYX.pdf
(181 pages)
- Current page: 36 of 181
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IDT™
92HD700
10-CHANNEL HIGH DEFINITION AUDIO CODEC
10-CHANNEL HIGH DEFINITION AUDIO CODEC
6.2.14. AFG GPIOEn
[31:5]
Bit
Bit
[1]
[0]
[4]
[3]
[2]
[1]
[0]
Set1
Get
Bitfield Name
Bitfield Name
Mask2
Mask1
Mask0
Data1
Data0
Rsvd
Rsvd
Rsvd
Table 38. AFG GPIOEn Command Response Format
Table 36. AFG GPIO Command Response Format
Table 37. AFG GPIOEn Command Verb Format
IDT CONFIDENTIAL
Verb ID
F16
716
RW
RW
RW
RW
RW
RW
RW
36
R
R
R
See bits [7:0] of bitfield table.
Reset
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Payload
Data for GPIO1. If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Data for GPIO0. If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Reserved
Reserved
Reserved
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO1:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
00
92HD700
Description
Description
See bitfield table.
0000_0000h
Response
PC AUDIO
V 1.2 112006
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