S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 40
S3C72G9
Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
1.S3C72G9.pdf
(96 pages)
- Current page: 40 of 96
- Download datasheet (2Mb)
BTST
Operation:
Description:
Examples:
dst.b
C
DA.b
mema.b
memb.@L
@H+DA.b
The specified bit within the destination operand is tested. If it is "1", the instruction that
immediately follows the BTST instruction is skipped; otherwise the instruction following the BTST
instruction is executed. The destination bit value is not affected.
C
DA.b
mema.b
memb.@L
@H+DA.b
1. If RAM bit location 30H.2 is set to “0”, the following instruction sequence will execute the RET
Operand
instruction:
BTST
RET
JP
mema.b
Operand
30H.2
LABEL2
a7
1
1
1
1
0
1
0
1
1
a6
1
1
1
1
1
1
0
0
1
Test carry bit and skip if set (= "1")
Test specified bit and skip if memory bit is set
b1
a5
b1
b1
b1
0
1
1
0
1
Second Byte
Binary Code
b0
a4
b0
b0
b0
1
1
1
0
1
Operation Summary
; If 30H.2 = "1", then skip
; If 30H.2 = "0", return
a3
a5
a3
a3
a3
0
0
1
1
1
a2
a4
a2
a2
a2
1
0
0
0
0
a1
a3
a1
a1
a1
1
1
0
0
0
a0
a2
a0
a0
a0
1
1
1
1
1
Skip if C = 1
Skip if DA.b = 1
Skip if mema.b = 1
Skip if [memb.7-2 + L.3-2].
[L.1-0] = 1
Skip if [H + DA.3-0].b = 1
FB0H-FBFH
FF0H-FFFH
Operation Notation
Bit Addresses
Bytes
1
2
2
2
2
Cycles
2 + S
2 + S
1 + S
2 + S
2 + S
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