IDT72V73273BB IDT, Integrated Device Technology Inc, IDT72V73273BB Datasheet - Page 25

• Manufacturer Part Number: IDT72V73273BB
• Description: IC DGTL SW 32768X32768 208-BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr
• Type: Multiplexerr

Specifications of IDT72V73273BB

• Circuit: 8 x 1:1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 208-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output High, Low: -
• Independent Circuits: -
• Other names: 72V73273BB

NOTES:
1. Guaranteed by design.
2. 30pF loading on external output signals.
3. Refer to AC Electrical Test Conditions stated earlier in this document.
4. JTAG operations occur at one speed (10MHz). The base device may run at any speed specified in this datasheet.
TABLE 19 — SYSTEM INTERFACE PARAMETERS
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS and TRST.
TABLE 20 — JTAG AC ELECTRICAL CHARACTERISTICS
NOTE:
1. Device inputs = All device inputs except TDI, TMS and TRST.
IDT72V73273 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH WITH RATE MATCHING 32,768 x 32,768 CHANNELS
INSTRUCTION
EXTEST
BYPASS
IDCODE
HIGH-Z
SAMPLE/PRELOAD
RESERVED
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
JCYC
JCH
JCL
JR
JF
JRST
JRSR
JCD
JDC
JS
JH
JTAG Clock Input Period
JTAG Clock HIGH
JTAG Clock LOW
JTAG Clock Rise Time
JTAG Clock Fall Time
JTAG Reset
JTAG Reset Recovery
JTAG Data Output
JTAG Data Output Hold
JTAG Setup
JTAG Hold
(Device Outputs)
(Device Inputs)
All other codes Several combinations are reserved. Do not use other codes than those identified above.
TDI/TMS
TDO
CODE
0000
1111
0010
0011
0001
PARAMETER
TRST
TCK
(1)
Forces contents of the boundary scan cells onto the device outputs
Places the bypass register (BYR) between TDI and TDO.
Loads the ID register (IDR) with the vendor ID code and places the register between TDI and TDO.
Places the bypass register (BYR) between TDI and TDO. Forces all device output drivers to a High-Z state.
Places the boundary scan register (BSR) between TDI and TDO. SAMPLE allows data from device inputs
captured in the boundary scan cells and shifted serially through TDO. PRELOAD allows data to be input serially into the boundary
scan cells via the TDI.
t
JF
t
JRST
t
JRSR
t
t
JS
JCL
t
JR
Figure 10. JTAG Timing Specifications
t
JCYC
MIN.
t
100
JH
40
40
50
50
15
15
0
t
JCH
MAX.
3
3
25
25
(1)
(1)
DESCRIPTION
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1)
. Places the boundary scan register (BSR) between TDI and TDO.
t
JCD
t
JDC
INDUSTRIAL TEMPERATURE RANGE
(1,2,3,4)
6140 drw07
x
(2)
and outputs
(1)
to be