ATMEGA64-16 AU ATMEL Corporation, ATMEGA64-16 AU Datasheet

ATMEGA64-16 AU

Manufacturer Part Number

ATMEGA64-16 AU

Description

Manufacturer

ATMEL Corporation

Datasheet

1.ATMEGA64-16_AU.pdf (24 pages)

Specifications of ATMEGA64-16 AU

Case

QFP

Date_code

08+

Current page: 1 of 24
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Features

•

High-performance, Low-power AVR

Advanced RISC Architecture

High Endurance Non-volatile Memory segments

JTAG (IEEE std. 1149.1 Compliant) Interface

Peripheral Features

Special Microcontroller Features

I/O and Packages

Operating Voltages

Speed Grades

– 130 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers + Peripheral Control Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-chip 2-cycle Multiplier

– 64K Bytes of In-System Reprogrammable Flash program memory

– 2K Bytes EEPROM

– 4K Bytes Internal SRAM

– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

– Data retention: 20 years at 85°C/100 years at 25°C

– Optional Boot Code Section with Independent Lock Bits

– Up to 64K Bytes Optional External Memory Space

– Programming Lock for Software Security

– SPI Interface for In-System Programming

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes

– Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode, and

– Real Time Counter with Separate Oscillator

– Two 8-bit PWM Channels

– 6 PWM Channels with Programmable Resolution from 1 to 16 Bits

– 8-channel, 10-bit ADC

– Byte-oriented Two-wire Serial Interface

– Dual Programmable Serial USARTs

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with On-chip Oscillator

– On-chip Analog Comparator

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby

– Software Selectable Clock Frequency

– ATmega103 Compatibility Mode Selected by a Fuse

– Global Pull-up Disable

– 53 Programmable I/O Lines

– 64-lead TQFP and 64-pad QFN/MLF

– 2.7 - 5.5V for ATmega64L

– 4.5 - 5.5V for ATmega64

– 0 - 8 MHz for ATmega64L

– 0 - 16 MHz for ATmega64

True Read-While-Write Operation

Capture Mode

and Extended Standby

In-System Programming by On-chip Boot Program

8 Single-ended Channels

7 Differential Channels

2 Differential Channels with Programmable Gain (1x, 10x, 200x)

8-bit Microcontroller

(1)

8-bit

Microcontroller

with 64K Bytes

In-System

Programmable

Flash

ATmega64

ATmega64L

Summary

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