FX619J Consumer Microcircuits Limited, FX619J Datasheet

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FX619J

Manufacturer Part Number
FX619J
Description
CDIP
Manufacturer
Consumer Microcircuits Limited
Datasheet

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Features/Applications
Brief Description
The FX619 is an LSI circuit designed as a
*Continuously Variable Slope Delta Codec and
is intended for use in military communications
systems.
Designed to meet Eurocom D1-IA8 with
external components, the device is suitable for
applications in military Delta Multiplexers,
switches and phones.
Encoder input and decoder output filters are
incorporated on-chip. Sampling clock rates can
be programmed to 16, 32 or 64 k bits/second
from an internal clock generator or may be
externally applied in the range 8 to 64 k bits/
second. Sampling clock frequencies are output
for the synchronization of external circuits.
Fig.1 Internal Block Diagram
Designed to Meet Eurocom
Meets Stanag 4209 and
Stanag 4380
Military Communications
Delta MUX, Switch and Phone
Applications
Single Chip Full Duplex Codec
ENCODER INPUT
V
DATA ENABLE
ENCODER FORCE IDLE
V
XTAL/CLOCK
XTAL
ENCODER DATA CLOCK
DECODER DATA CLOCK
V
MODE 1
MODE 2
ALGORITHM
POWERSAVE
DECODER INPUT
DECODER FORCE IDLE
BIAS
DD
SS
f
CLOCK MODE
3
f
LOGIC
1
DEMOD
CML Semiconductor Products
PRODUCT INFORMATION
FX619
SAMPLING RATE
f
0
CONTROL
GENERATORS
CLOCK RATE
D1-IA8f
'Eurocom' Delta Codec
3 or 4-BIT
6.1
The encoder has an enable function for use in
multiplexer applications. Encoder and Decoder
forced idle facilities are provided forcing a
10101010..... pattern in encode and a V
bias in decode. The companding circuits may
be operated with a 3 or 4-bit algorithm which is
externally selected. The device may be put in
the standby mode by selection of the
powersave facility. A reference 1.024MHz
oscillator uses an external clock or Xtal.
The FX619 is a low-power, 5 volt CMOS
device and is available in 22-pin cerdip DIL,
24-lead/pin plastic and 28-lead ceramic
leadless SMT packages.
f
f
2
1
Programmable Sampling Clocks
3 or 4-bit Compand Algorithm
Forced Idle Facility
Powersave Facility
Single 5V CMOS Process
Full Duplex CVSD* Codec
On-Chip Input and Output Filters
MOD
Publication D/619/6 September 1997
ENCODER OUTPUT
DECODER OUTPUT
FX619
DD
/2

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