ASC7611 ETC2 [List of Unclassifed Manufacturers], ASC7611 Datasheet - Page 19

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ASC7611

Manufacturer Part Number
ASC7611
Description
HARDWARE MONITOR WITH INTEGRATED FAN CONTROL
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
The Fan Tachometer Reading registers contains the number of 11.111μs periods (90 kHz) between full fan revolutions. The
results are based on the time interval of two tachometer pulses, since most fans produce two tachometer pulses per full
revolution. These registers will be updated at least once every second. Common interpretation of tachometer readings is to
take the binary period measurement and convert it to RPM. This may be done by applying the formula:
The value, for each fan, is represented by a 16-bit unsigned number.
The Fan Tachometer Reading registers will always return an accurate fan tachometer measurement, even when a fan is
disabled or non-functional, however, if PWM commands for a fan (register 30h to 32h) is zero, tach measurements are
suspended and the last reading may remain in the register.
FF FFh indicates that the fan is not spinning, or that the tachometer input is not connected to a valid signal. This value may
be FF FEh or FF FCh if Measurement Duration, bits 1:0 of register 3A-3Dh are set to 01 or 00, respectively. These registers
are read-only – a write to these registers has no effect.
When the LSByte of the aSC7611 16-bit register is read, the other byte (MSByte) is latched at the current value until it is
read. At the end of the MSByte read the Fan Tachometer Reading registers are updated. During spin-up, the PWM duty
cycle reported is 0%.
Registers 54-5Bh: Fan Tachometer Limits
The Fan Tachometer Low Limit registers indicate the tachometer reading under which the corresponding bit will be set in the
Interrupt Status Register 2 register. In Auto Fan Control mode, the fan can run at low speeds, so care should be taken in
software to ensure that the limit is high enough not to cause sporadic alerts. The fan tachometer will not cause a bit to be
set in Interrupt Status Register 2 if the current value in Current PWM Duty registers (30h to 32h) is 00h or if the fan is
disabled via the Fan Configuration Register. Interrupts will not be generated for a fan if its minimum is set to FF FFh except
for timeout. Setting the Ready/Lock/Start/Override register Lock bit has no effect on these registers.
Given the relative insignificance of Bit 0 and Bit 1, these bits could be programmed to designate the physical location of the
fan generating the tachometer signal, as follows:
© Andigilog, Inc. 2006
Register
Address
Register
Address
2Dh
2Eh
2Fh
5Ah
5Bh
54h
55h
56h
57h
58h
59h
RPM = (90,000 x 60)/(Decimal Equivalent of binary Tach Reading)
Read/
Write
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Tach 3 MS Byte
Tach 4 LS Byte
Tach 4 MS Byte
Tach 1 Minimum
LS Byte
Tach 1 Minimum
MS Byte
Tach 2 Minimum
LS Byte
Tach 2 Minimum
MS Byte
Tach 3 Minimum
LS Byte
Tach 3 Minimum
MS Byte
Tach 4 Minimum
LS Byte
Tach 4 Minimum
MS Byte
Register Name
Register
Name
CPU Cooler
Memory Controller
Chassis Front
Chassis Rear
Register Name
(MSB)
Bit 7
(MSB)
15
15
15
15
7
7
7
7
Bit 7
15
15
7
Bit 6
14
14
14
14
Bit 6
6
6
6
6
14
14
www.andigilog.com
6
Bit 5
- 19 -
13
13
13
13
Bit 5
5
5
5
5
13
13
5
Bit 1
0
0
1
1
Bit 4
Bit 4
12
12
12
12
4
4
4
4
12
12
4
Bit 0 (LSB)
Bit 3
Bit 3
0
1
0
1
11
11
11
11
3
3
3
3
11
11
3
Bit 2
Bit 2
10
10
10
10
10
10
2
2
2
2
2
Bit 1
Bit 1
October 2006 - 70A05007
1
9
1
9
1
9
1
9
9
1
9
aSC7611
(LSB)
(LSB)
Bit 0
Bit 0
8
0
8
0
8
0
8
0
8
0
8
Default
Default
Value
Value
N/A
N/A
N/A
FF
FF
FF
FF
FF
FF
FF
FF

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