H5PS1G63EFR HYNIX [Hynix Semiconductor], H5PS1G63EFR Datasheet - Page 42

• Manufacturer Part Number: H5PS1G63EFR
• Description: 1Gb DDR2 SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.4 / Nov 2008
tracting 0.02 x tCK (avg) from it, whereas if an input clock has a worst case tCH (avg) of 0.52, the tAOF,
max should be derated by adding 0.02 x tCK (avg) to it. Therefore, we have;
tAOF, min (derated) = tAC, min - [0.5 - Min(0.5, tCH (avg), min)] x tCK (avg)
tAOF, max (derated) = tAC, max + 0.6 + [Max(0.5, tCH (avg), max) - 0.5] x tCK (avg)
or
tAOF, min (derated) = Min (tAC, min, tAC, min - [0.5 - tCH (avg), min] x tCK (avg))
tAOF, max (derated) = 0.6 + Max (tAC, max, tAC, max + [tCH (avg), max - 0.5] x tCK (avg))
where tCH (avg), min and tCH (avg), max are the minimum and maximum of tCH (avg) actually measured
at the DRAM input balls.
Note that these deratings are in addition to the tAOF derating per input clock jitter, i.e. tJIT (duty) and
tERR(6-10per). However tAC values used in the equations shown above are from the timing parameter
table and are not derated. Thus the final derated values for tAOF are;
tAOF, min (derated _ final) = tAOF, min (derated) + {- tJIT (duty), max - tERR(6-10per),max}
tAOF, max (derated _ final) = tAOF, max (derated) + {- tJIT (duty), min - tERR(6-10per),min}
H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
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