HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 20
HM17CM256
Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.HM17CM256.pdf
(111 pages)
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HM17CM256
(7) Window address assign of display RAM
(8) display RAM data and LCD
(9) Segment display output order/reverse set up
- 20 -
reverse display by REV register are set up as follows.
by reversing access to display RAM from MPU by using REF register, lessen the limitation in placing
IC when assembling an LCD panel module.
display RAM designated by X and Y address.
designated two points.
the end point of them is done by X end address and Y end address register value.
inner addresses depend on WLS bit.
sequence and end point X address, Y address in sequence after executing Win command (WIN=“1”,
auto increase mode AXI=“1”, AYI=“1”) and then access to Display RAM.
area.
( end point of Y address ).
Display RAM data related with one dot of LCD is dependent on REV register. Normal display and
The order of display outputs, SEGA
This IC can be accessed to display RAM by window area designation in addition to access to
Through address space of all display address, specific area of RAM can be accessed by
The start point of two point addresses is assigned by normal X address and Y address register and
Read modified write action can be taken by AIM=“1”.
In case of using window area accessing mode, you must set start point X address, Y address in
And set start point and end point not to be designated to access the outside of available address
TABLE
REV
Address set value should be taken to set AX
H
L
(X, Y)
address designation
reverse
Display
normal
RAM data
0
, SEGB
Window display area
0
1
0
1
0
, SEGC
X direction
0
to SEGA
EX ( end point of X address ) and AY EY
127
, SEGB
end address designation
(X, Y)
All display RAM area
127
, and can be reversed
Designated
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