HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 74
HM17CM256
Manufacturer Part Number
HM17CM256
Description
128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.HM17CM256.pdf
(111 pages)
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(34-30) Dummy segment driver address selection ( Refer to dummy segment drive related description. )
CS
( reset :{DMY}=0
0
And the image selected by COMI
display data from corresponding register not from display RAM.
and so 00
When data is to be written to dummy segment driver, this register is active (DMY=”1”).
BT command : inversion timing selection at line inversion display
And be cautious that LREV and BT commands have no influence on dummy segment driver circuit.
Normal segment drivers acquire display data from display RAM, but dummy segment drivers acquire
That is correspond to SEGSA
When accessing with DMY = “1”, address setting is valid by only X address.
RS
1
BT=”0”: Negative tone display in specified area
BT=”1”: The image of specified area is blinked by every 32 frame.
DMY=”0”: normal display RAM access
DMY=”1”: display data access to dummy segment driver
H
, 01
RD
1
H
, read address :8
H
, 02
WR
0
H
, 03
Line inversion display example (LREV=”1”,BT=”1”)
RE
H
1
is valid at 8 bits mode and 00
2
H
0
RE
) * : “Don’t care”
~SEGSA
0
0
, COMI
1
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
Display example (BT=”1”)
RE
1
1
3
every 32 frame.
0
is excluded.
Changes per
SEGSB
D
1
7
0
~SEGSB
D
0
H
6
, 01
3
every 32 frame.
H
Changes per
D
0
SEGSC
5
is valid at 16 bits mode.
The capacity of register is 4 bytes.
D
1
4
line inversioin start address
line inversioin end address
0
~SEGSC
D
*
3
There is 4 byte capacity,
3
output.
D
*
2
D
*
1
There is no
DMY
D
0
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