ICX224 SONY [Sony Corporation], ICX224 Datasheet - Page 12

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ICX224

Manufacturer Part Number
ICX224
Description
Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
Manufacturer
SONY [Sony Corporation]
Datasheet
Serial interface clock internal loading characteristics (2)
Serial interface clock output variation characteristics
Normally, the serial interface data is loaded to the CXD3410GA at the timing shown in "Serial interface clock
internal loading characteristics (1)" above. However, one exception to this is when the data such as STB is
loaded to the CXD3410GA and controlled at the rising edge of SEN1. See "Description of Operation".
Be sure to maintain a constantly high SEN1 logic level near the falling edge of VD.
t
t
tpdPULSE
s1
h1
Symbol
Symbol
Output signal
SEN1
SEN1 setup time, activated by the falling edge of VD
SEN1 hold time, activated by the falling edge of VD
Output signal delay, activated by the rising edge of SEN1
HD
HD
VD
VD
SEN1
0.8V
DD
d
0.2V
DD
ts1
d
Enlarged view
Definition
Definition
0.8V
th1
DD
d
0.2V
tpdPULSE
– 12 –
DD
d
(Within the recommended operating conditions)
(Within the recommended operating conditions)
Example: During frame mode
Min.
Min.
200
0
5
Typ.
Typ.
Max.
Max.
100
CXD3410GA
Unit
Unit
ns
ns
ns

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