ICX224 SONY [Sony Corporation], ICX224 Datasheet - Page 24
ICX224
Manufacturer Part Number
ICX224
Description
Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
Manufacturer
SONY [Sony Corporation]
Datasheet
1.ICX224.pdf
(49 pages)
- Current page: 24 of 49
- Download datasheet (403Kb)
Control data: D12 CCD [CCD switching]
Specify CCD image sensor to use. However, the CCD switching bits are loaded to the CXD3410GA and reflected
at the falling edge of VD.
The default is "ICX224/ICX284".
See the Pin Status Table for the pin status in each mode.
Control data: D36 to D37 LDAD [ADCLK logic phase]
This indicates the ADCLK logic phase adjustment data. The default is 90° relative to MCKO.
Control data: D38 to D39 STB [Standby]
The operating mode of the timing generator block is switched as follows. However, the standby bits are loaded
to the CXD3410GA and control is applied immediately at the rising edge of SEN1.
D12
D37
D39
0
1
X
0
0
1
1
0
1
ICX224/ICX284
ICX202/ICX232
D36
D38
0
1
0
1
0
1
1
Symbol
Degree of adjustment (°)
CAM
STB
SLP
CCD
Normal operating mode
Sleep mode
Standby mode
180
270
90
0
Operating mode
– 24 –
CXD3410GA
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