ICX224 SONY [Sony Corporation], ICX224 Datasheet - Page 43

no-image

ICX224

Manufacturer Part Number
ICX224
Description
Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
Manufacturer
SONY [Sony Corporation]
Datasheet
SCK2
SEN2
PGA Gain Setting Data
CCD Signal Processor Block Serial Interface Control
The CXD3410GA's CCD signal processor block basically loads the CCD signal processor block serial interface
data sent in the following format at the rising edge of SEN2, and the setting values are then reflected to the
operation 6 ADCLKI clocks after that.
CCD signal processor block serial interface control requires clock input to ADCLKI in order to load and reflect
the serial interface data to operation, so this should normally be performed when the timing generator block is
in the normal operation mode.
There are four categories of CCD signal processor block serial interface data: standby control data, PGA gain
setting data, OB clamp level setting data, and input pulse polarity setting data.
Note that when data from multiple categories is loaded consecutively, the data for the category loaded last is
valid and data from other categories is lost. When transferring data from multiple categories, raise SEN2 for
each category and wait until the setting value 6 ADCKLI clocks after that has been reflected to operation, then
transmit the next category.
The detail of each data are described below.
Standby Control Data
SSI2
Data
Data
D00
D01
D03
D04
D14
D15
D00
D01
D03
D04
D05
D06
D15
to
to
to
to
to
TEST
CTG
FIXED
STB
TEST
CTG
FIXED
GAIN
Symbol
Symbol
00
Test code
Category switching
Standby control
Test code
Category switching
PGA gain setting data
01
02
Function
Function
03
04
05
– 43 –
06
07
Normal operating mode
08
09
Data = 0
Data = 0
10
See D06 to D15 GAIN.
11
D01 to D03 CTG
D01 to D03 CTG
Set to All 0.
Set to All 0.
12
Set to 0.
Set to 0.
13
14
Standby mode
Data = 1
Data = 1
15
CXD3410GA

Related parts for ICX224