89C51IC2-CM ATMEL [ATMEL Corporation], 89C51IC2-CM Datasheet - Page 17
89C51IC2-CM
Manufacturer Part Number
89C51IC2-CM
Description
8-bit Flash Microcontroller with 2-wire Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.89C51IC2-CM.pdf
(146 pages)
- Current page: 17 of 146
- Download datasheet (2Mb)
Functional Block
Diagram
Figure 3. Functional Oscillator Block Diagram
Operating Modes
Reset
Functional Modes
Normal Modes
4301A–8051–01/04
XtalA1
XtalA2
PwdOscA
XtalB1
XtalB2
OSCCON
OscAEn
OscA
PwdOscB
FOSCA
OSCCON
OscB
OscBEn
:2
Reset
A hardware RESET puts the Clock generator in the following state:
The selected oscillator depends on OSC bit in Hardware Security Byte (HSB)
Table 84)
HSB.OSC = 1 (Oscillator A selected)
•
•
HSB.OSC = 0 (Oscillator B selected)
•
•
•
•
•
OscAEn = 1 & OscBEn = 0: OscA is running, OscB is stopped.
CKS = 1: OscA is selected for CPU.
OscAEn = 0 & OscBEn = 1: OscB is running, OscA is stopped.
CKS = 0: OscB is selected for CPU.
CPU and Peripherals clock depend on the software selection using CKCON0,
CKCON1 and CKRL registers
CKS bit in CKSEL register selects either OscA or OscB
CKRL register determines the frequency of the OscA clock.
CKCON0
CKRL
X2
0
1
Prescaler-Divider
8-bit
Reload
CKRL=0xFF?
FOSCB
1
0
CKSEL
CKS
1
0
:128
Idle
AT89C51IC2
CLK
PERIPH
CLK
CPU
Sub
Clock
Peripheral Clock
CPU clock
(see HSB
17
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