AD28msp01KST AD [Analog Devices], AD28msp01KST Datasheet - Page 20

• Manufacturer Part Number: AD28msp01KST
• Description: PSTN Signal Port
• Manufacturer: AD [Analog Devices]

AD28msp01
TIMING PARAMETERS
Parameter
Clock Signals
Timing Requirement:
Switching Characteristic:
Control Signals
Timing Requirement:
NOTE
1
Serial Port 3-State
Parameter
Switching Characteristic:
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 1000 processor cycles assuming stable CLKIN (not including
crystal oscillator start-up time).
F
t
t
t
t
t
t
t
t
t
t
MCK
MKL
MKH
SCK
SKL
SKH
RSP
SPD
SPE
SPV
MCK
MCLK
SCLK
SDOFS
SCLK
SDO
CS
CS Low to SDO, SDOFS, SCLK Disable
CS High to SDO, SDOFS, SCLK Enable
CS High to SDO, SDOFS, SCLK Valid
MCLK Frequency
MCLK Period
MCLK Width Low
MCLK Width High
SCLK Period
SCLK Width Low
SCLK Width High
RESET Width Low
Figure 17. Serial Port 3-State
Figure 16. Clock Signals
t
t
MKL
SKL
–20–
t
t
t
SPD
MCK
SCK
Min
0.5t
0.5t
8t
4t
4t
5t
13.824
72.34
MCK
MCK
MCK
MCK
t
t
SKH
MKH
MCK
MCK
1
– 10
– 10
– 10
– 10
– 10
t
SPE
t
SPV
Min
0
Max
13.824
72.34
0.5t
0.5t
8t
4t
4t
MCK
MCK
MCK
MCK
MCK
+ 10
+ 10
+ 10
+ 10
+ 10
20
25
Max
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
50 ppm
REV. A
Unit
ns
ns
ns