29F0408RPFB MAXWELL [Maxwell Technologies], 29F0408RPFB Datasheet

29F0408RPFB

Manufacturer Part Number

29F0408RPFB

Description

32 Megabit (4M x 8-Bit) Flash Memory

Manufacturer

MAXWELL [Maxwell Technologies]

Datasheet

1.29F0408RPFB.pdf (33 pages)

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• Single 5.0 V supply

• Excellent Single Event Effect

· - SEL

· - SEU

• Organization:

• Automatic program and erase

• 528-Byte page read operation

• Fast write cycle time

• Command/address/data multiplexed I/O port

• Hardware data protection

• Reliable CMOS floating-gate technology

• Command register operation

• 44 pin flat package

(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com

EATURES

- SEU saturated cross section: 2E-6 cm

- Memory cell array: (4M + 128k) bit x 8bit

- Data register: (512 + 16) bit x 8bit

- Page program: (512 + 16) Byte

- Block erase: (8K + 256) Byte

- Status register

- Random access: 10 µ s (max)

- Serial page access: 50 ns (min)

- Program time: 250 µ s (typ)

- Block erase time: 2 ms (typ)

- Program/erase lockout during power transitions

- Endurance: 1,000,000 program/erase cycles

- Data retention: 10 years

: > 60 MeV/mg/cm

: = 37 MeV/mg/cm

/bit

11.08.02 Rev 2

Maxwell Technologies’ 29F0408 high-performance flash mem-

ory. The 29F0408 is a 4M (4,194,304) x 8-bit NAND Flash

Memory with a spare 128K (131,072) x 8-bit. A program oper-

ation programs the 528-byte page in 250 µ s and an erase

operation can be performed in 2 ms on an 8K-byte block. Data

within a page can be read out at 50 ns cycle time per byte.

The on-chip write controller automates all program and erase

functions, including pulse repetition, where required, and inter-

nal verify and margining of data. Even write-intensive systems

can take advantage of the 29F0408’s extended reliability of

1,000,000 program/erase cycles by providing either ECC

(Error Correction Code) or real time mapping-out algorithm.

These algorithms have been implemented in many mass stor-

age applications. The spare 16 bytes of a page combined with

the other 512 bytes can be utilized by system-level ECC. The

29F0408 is an optimum solution for large non-volatile storage

applications such as solid state storage, digital voice recorder,

digital still camera and other portable applications requiring

nonvolatility.

Maxwell Technologies' patented R

ogy incorporates radiation shielding in the microcircuit pack-

age. Capable of surviving in space environments, the

29F0408 is ideal for satellite, spacecraft, and space probe

missions. It is available with packaging and screening up to

Class S.

ESCRIPTION

Logic Diagram

All data sheets are subject to change without notice

32 Megabit (4M x 8-Bit)

Flash Memory

-P

29F0408

® packaging technol-

Related parts for 29F0408RPFB

29F0408RPFB Summary of contents

Page 1

F : EATURES • Single 5.0 V supply • Excellent Single Event Effect · - SEL : > 60 MeV/mg/ · - SEU : = 37 MeV/mg/ SEU saturated cross section: 2E-6 cm • ...

Megabit (4M x 8-Bit) Flash Memory YMBOL 2 Command Latch The CLE input controls the path activation for commands sent to the command register. Enable (CLE) When active high, commands are latched into the command register ...

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Megabit (4M x 8-Bit) Flash Memory T 2. 29F0408 A ABLE P ARAMETER Voltage on any pin relative Operating Temperature Storage temperature Short circuit output current 1. Minimum DC voltage is -0 input/output pins. ...

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Megabit (4M x 8-Bit) Flash Memory T 6. 29F0408 DC ABLE ( ± 10 ARAMETER YMBOL Operating current Sequential I CC1 read Program I CC2 Erase I CC3 Stand-by-current (TTL) I SB1 ...

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Megabit (4M x 8-Bit) Flash Memory CLE ALE When SE is ...

Page 6

Megabit (4M x 8-Bit) Flash Memory T 10. 29F0408 AC T ABLE ( ± 10 ARAMETER CLE set-up time CLE hold time CE setup time CE hold time WE pulse width ALE setup ...

Page 7

Megabit (4M x 8-Bit) Flash Memory T 11. 29F0408 AC C ABLE ( ± 10 ARAMETER CE low to status output RE high to WE low WE high to RE low RE access ...

Page 8

Megabit (4M x 8-Bit) Flash Memory block information and create the invalid block table via the following suggested flow chart (Figure 1). Any intentional erasure of the original block information is prohibited IGURE Error in write ...

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Megabit (4M x 8-Bit) Flash Memory Pointer Operation: The 29F0408 has three modes to set the destination of the pointer. The pointer is set to “A” area by the “00h” com- mand, to “B” area by the “01h” command, ...

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Megabit (4M x 8-Bit) Flash Memory IGURE XAMPLES OF T ABLE System Interface Using CE don’t-care. For a easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal ...

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Megabit (4M x 8-Bit) Flash Memory IGURE Timing requirements exerted high during data-loading, tCS must be minimum 10ns and tWC must be increased accord- ingly. F IGURE ROGRAM PERATION ...

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Megabit (4M x 8-Bit) Flash Memory F F 13. S IGURE EQUENTIAL 12 IGURE NPUT ATA ATCH YCLE (CLE = ALE = L) UT YCLE AFTER EAD All ...

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Megabit (4M x 8-Bit) Flash Memory F IGURE F 14 IGURE TATUS EAD YCLE 15. READ1 PERATION EAD All data sheets are subject to change without notice 11.08.02 Rev 2 29F0408 P ) ...

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Megabit (4M x 8-Bit) Flash Memory F 16. READ1 O IGURE F IGURE (I PERATION NTERCEPTED BY 17. READ2 PERATION EAD All data sheets are subject to change without notice 11.08.02 Rev 2 29F0408 CE) P ...

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Megabit (4M x 8-Bit) Flash Memory F IGURE F 18 EQUENTIAL OW EAD 19 IGURE AGE ROGRAM PERATION All data sheets are subject to change without notice 11.08.02 Rev 2 29F0408 PERATION ...

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Megabit (4M x 8-Bit) Flash Memory F 20. B IGURE F 21. M IGURE LOCK RASE PERATION RASE & ANUFACTURE EVICE EAD All data sheets are subject to change without notice 11.08.02 ...

Page 21

Megabit (4M x 8-Bit) Flash Memory DEVICE OPERATION PAGE READ Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00h to the command register along with three address cycles. Once ...

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Megabit (4M x 8-Bit) Flash Memory F IGURE F 25. S IGURE 24 READ1 O EQUENTIAL OW READ2 O (SE = EQUENTIAL PERATION All data sheets are subject to change without notice 11.08.02 Rev 2 29F0408 PERATION ...

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Megabit (4M x 8-Bit) Flash Memory PAGE PROGRAM The device is programmed basically on a page basis, but it does allow multiple partial page programming of a byte or consecutive bytes up to 528 single page program ...

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Megabit (4M x 8-Bit) Flash Memory BLOCK ERASE The Erase operation can erase on a block (8K Byte) basis. Block address loading is accomplished in two cycles initiated by an Erase Setup command (60h). Only address A13 to A21 ...

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Megabit (4M x 8-Bit) Flash Memory T ABLE READ ID The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of 00h. Two read cycles sequentially output the manufacture ...

Page 28

Megabit (4M x 8-Bit) Flash Memory RESET The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random read, program or erase modes, the reset operation will ...

Page 29

Megabit (4M x 8-Bit) Flash Memory F IGURE READY/BUSY The device has a R/B output that provides a hardware method of indicating the completion of a page pro- gram, erase and random read completion. The R/B pin is normally ...

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Megabit (4M x 8-Bit) Flash Memory S YMBOL ® LAT ACKAGE D IMENSION ...

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Megabit (4M x 8-Bit) Flash Memory Important Notice: These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within ...

Page 33

Megabit (4M x 8-Bit) Flash Memory Product Ordering Options Model Number 29F0408 Feature Option Details Screening Flow Monolithic S = Maxwell Class Maxwell Class Industrial (testing @ -40°C, +25°C, +125°C) ...

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