DM9010_06 DAVICOM [Davicom Semiconductor, Inc.], DM9010_06 Datasheet - Page 29
DM9010_06
Manufacturer Part Number
DM9010_06
Description
10/100 Mbps Single Chip Ethernet Controller with General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9010_06.pdf
(62 pages)
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6.51 Interrupt Mask Register (FFH)
Preliminary
Version: DM9010-17--DS-P04
Jan. 18, 2006
7:6
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
RESERVED
LNKCHGI
LNKCHG
IOMODE
UDRUNI
UDRUN
Name
ROOI
ROO
ROS
PAR
ROI
PRI
PTI
PR
PT
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW
PHS0,RW
PHS0,RW
HPS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
Default
T0, RO
RO
Enable the SRAM read/write pointer to automatically return to the start address
when pointer addresses are over the SRAM size. Driver needs to set. When
driver sets this bit, REG_F5 will set to 0Ch automatically
Reserved
Enable Link Status Change Interrupt
Enable Transmit Underrun Interrupt
Enable Receive Overflow Counter Overflow Interrupt
Enable Receive Overflow Interrupt
Enable Packet Transmitted Interrupt
Enable Packet Received Interrupt
Transmit Underrun
Receive Overflow
Packet Transmitted
Packet Received
Bit 7 Bit 6
Link Status Change
Receive Overflow Counter Overflow
0
0
1
1
Single Chip Ethernet Controller with General Processor Interface
0
1
0
1
16-bit mode
32-bit mode
8-bit mode
Reserved
Description
DM9010
29
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