GL852-MNGXX GENESYS [GENESYS LOGIC], GL852-MNGXX Datasheet

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GL852-MNGXX

Manufacturer Part Number
GL852-MNGXX
Description
USB 2.0 MTT HUB Controller
Manufacturer
GENESYS [GENESYS LOGIC]
Datasheet
Genesys Logic, Inc.
GL852
USB 2.0
MTT
HUB Controller
Datasheet
Revision 1.14
Jul. 19, 2007

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GL852-MNGXX Summary of contents

Page 1

... Genesys Logic, Inc. GL852 USB 2.0 MTT HUB Controller Datasheet Revision 1.14 Jul. 19, 2007 ...

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... All trademarks are the properties of their respective owners. Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Page 2 ...

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... Changed GL852-N to GL852 1.GL852 48 Pin Pinout, Pin List, Pin Description, p.10~13 Add GL852 QFN 48PIN Modify GL852 48 Pin QFN Package, p.30 Modify Clock and Reset Interface of GL852 48 pin to 64 pin, p.14 Modify 93C46 Configuration, Table 5.1, p.22 Modify General Description, Ch1, p.7 Modify RESET# Setting, Ch5.2.1, p.18 Add “T ” ...

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... CHAPTER 6 ELECTRICAL CHARACTERISTICS............................... 24 6 AXIMUM ATINGS 6 PERATING ANGES 6 HARACTERISTICS 6 OWER ONSUMPTION 6 HARACTERISTICS CHAPTER 7 PACKAGE DIMENSION..................................................... 28 CHAPTER 8 ORDERING INFORMATION ............................................ 31 ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller TABLE OF CONTENTS ................................................................................... 13 I/O S ....................................................... 18 ETTINGS ................................................................................. 24 ................................................................................ 24 ............................................................................ 24 ............................................................................ 26 ............................................................................ 27 Page 4 ...

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... F 3.1- - - - GL852 64 P IGURE F 3.2- - - - GL852 48 P IGURE F 3.2- - - - GL852 48 P IGURE F 4.1 - GL852 B IGURE LOCK F 5 IGURE PERATING IGURE PERATING IN F 5.3 - RESET# (E IGURE F 5 IGURE OWER ON SEQUENCE IGURE IMING OF F 5.6 - GANG M ...

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... T 3.1- - - - GL852 64 P ABLE T 3.2- - - - GL852 48 P ABLE T 3 ABLE IN ESCRIPTIONS T 5.1 - 93C46 C ABLE ONFIGURATION T 6 ABLE AXIMUM T 6 ABLE PERATING T 6 ABLE HARACTERISTICS T 6 ABLE HARACTERISTICS ABLE HARACTERISTICS ABLE UPPLY T 6 ...

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... To fully meet the performance requirement, GL852 series is a multiple TT hub solution to provide every down stream port with a TT. With the dedicated TT in each down stream port, GL852 can provide the best performance even connect with several Full/Low-Speed devices and running heavy bandwidth-consuming operations concurrently ...

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... LQFP package , 48-pin LQFP package , 48-pin QFN package • Applications: Stand-alone USB hub − − Monitor hub − PC motherboard USB hub, Docking of notebook Any compound device to support USB HUB function − ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Page 8 ...

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... CHAPTER 3 PIN ASSIGNMENT 3.1 Pinouts Figure 3.1 ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller GL852 - - - - G L852 64 Pin LQFP Pinout Diagram Page 9 ...

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... Figure 3.2 ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller GL852 - - - - G L852 48 Pin LQFP Pinout Diagram Page 10 ...

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... Figure 3.2 ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller GL852 - - - - G L852 48 Pin QFN Pinout Diagram Page 11 ...

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... DP1 B 7 AVDD P 8 AGND P 9 DM2 B 10 DP2 B ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller - - - - Table 3.1 G L852 64 Pin List 17 RREF AVDD P 34 GREEN4 19 AGND P 35 AMBER4 DGND ...

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... Individual/gang mode is strapped during this period. After the strapping period, this pin will be set to output mode, and then output high for normal mode. B When GL852 is suspended, this pin will output low. *For detailed explanation, please see Chapter 5 Gang input:1, output: 0@normal, 1@suspend ...

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... DGND 47 51,58,62 2,5~7,10 13,16,24, 27,30,33 Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the power routing and the ground plane. For detailed information, please refer to GL852 Design Guideline. Notation: Type O Output I Input B Bi-directional B/I Bi-directional, default input B/O Bi-directional, default output ...

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... REPEATER (Transaction Translator) DSPORT1 Logic DSPORT2 Logic DSPORT DSPORT Transceiver Transceiver D- LED/ D+ OVCUR/ PWRENB Figure 4.1 - GL852 Block Diagram (multiple TT) ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller 12MHz PLL FRTIMER x40, x10 USPORT SIE Logic TT (Transaction Translator) ...

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... The functionality of FRTIMER is described in section 11.2 of USB Specification Revision 2.0. 5.1.4 µ the micro-processor unit of GL852 8-bit RISC processor with 2K ROM and 64 bytes RAM. It operates at 6MIPS of 12Mhz clock to decode the USB command issued from host and then prepares the data to respond to the host. In addition, C can handle GPIO (general purpose I/O) settings and reading content of EEPROM to support high flexibility for customers of different configurations of hub ...

Page 17

... TT implements the control logic defined in section 11.14 ~ 11.22 of USB specification Revision 2.0. TT basically handles the unbalanced traffic speed between the USPORT (operating in HS) and DSPORTS (operating in FS/LS) of hub. GL852 adopts multiple TT architecture to provide the most performance effective solution. Multiple TT provides control logics for each downstream port respectively. ...

Page 18

... Configuration and I/O Settings 5.2.1 RESET# Setting GL852 integrates in the pull-up 1.5K resister of the upstream port. When RESET# is enabled, the internal 1.5K pull-up resister will be disconnected to the 3.3V power. To meet the requirement (p.141) of the USB 2.0 specification, pull-up resister should be disconnected while lacking of USB cable power (Vbus). ...

Page 19

... Figure 5.4 - Power on sequence of GL852 5.2.2 PGANG/SUSPND Setting To save pin count, GL852 uses the same pin to decide individual/gang mode as well as to output the suspend flag. The individual/gang mode is decided within 20us after power on reset. Then, about 50ms later, this pin is changed to output mode. GL852 outputs the suspend flag once it is globally suspended. For ...

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... SELF/BUS Power Setting GL852 can operate under bus power and conform to the power consumption limitation completely (suspend current < 2.5 mA, normal operation current < 100 mA). By setting PSELF, GL852 can be configured as a bus-power or a self-power hub. ©2000-2007 Genesys Logic Inc. - All rights reserved. ...

Page 21

... AMBER/GREEN Inside GL852 5.2.5 EEPROM Setting GL852 replies to host commands by the default settings in the internal ROM. GL852 also offers the ability to reply to the host according to the settings in the external EEPROM(93C46). The following table shows the configuration of 93C46. ©2000-2007 Genesys Logic Inc. - All rights reserved. ...

Page 22

... PRODUCT LENGTH: offset 40h contains the length of product string. Values of product string is contained from 41h~6Fh. 9. SERIAL NUMBER LENGTH: offset 70h contains the value of serial number string. Values of serial number string is contained after offset 71h. ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Table 5.1 - 93C46 Configuration ...

Page 23

... EE_DO Figure 5.9 - Schematics Between GL852 and 93C46 GL852 firstly verifies the check sum after power on reset. If the check sum is correct, GL852 will take the configuration of 93C46 as part of the descriptor contents. To prevent the content of 93C46 from being over-written, amber LED will be disabled when 93C46 exists. ...

Page 24

... HIGH level output voltage when I OH Leakage current for pads with internal pull up or pull I OLK down resistor R Pad internal pull down resister DN ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Table 6.1 - Maximum Ratings Parameter Table 6.2 - Operating Ranges Parameter Parameter =8mA OL =8mA OH Min ...

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... DPH/DMH static output LOW Transceiver capacitance IN I Hi-Z state data line leakage LO Z Driver output resistance for USB 2.0 HS DRV ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Parameter of 1. 15K to GND ) L Parameter of 1. 81K 103K 181K Min ...

Page 26

... Power Consumption Symbol Active ports I SUSP Active *1: 48/64-pin package types *2: F: Full-Speed, H: High-Speed ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Table 6 Supply Current Condition Host Device Suspend * ...

Page 27

... SK Low Time SKL t DI Setup Time DIS t DI Hold Time DIH t Output Delay to “1” PD1 t Output Delay to “0” PD0 Table 6 Characteristics of EEPROM Interface ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Min Typ Max 3.0 3.0 1.0 2.2 1.8 2.4 1.8 1.8 Units us Page 27 ...

Page 28

... CHAPTER 7 PACKAGE DIMENSION Figure 7.1 - GL852 64 Pin LQFP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller GL852 AAAAAAAGAA YWWXXXXXXXX Page 28 ...

Page 29

... Figure 7.2 – GL852 48 Pin LQFP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller GL852 AAAAAAAGAA YWWXXXXXXXX Page 29 ...

Page 30

... Figure 7.2 – GL852 48 Pin QFN Package ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Page 30 ...

Page 31

... CHAPTER 8 ORDERING INFORMATION Part Number GL852-MSNXX 64-pin LQFP GL852-MNNXX 48-pin LQFP GL852-MSGXX 64-pin LQFP GL852-MNGXX 48-pin LQFP GL852-ONGXX 48-pin QFN ©2000-2007 Genesys Logic Inc. - All rights reserved. GL852 USB 2.0 MTT HUB Controller Table 8.1 - Ordering Information Package Normal/Green Normal Package Normal Package ...

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