A54SX08A-PQG208I Microsemi, A54SX08A-PQG208I Datasheet - Page 42
A54SX08A-PQG208I
Manufacturer Part Number
A54SX08A-PQG208I
Description
Ic Fpga Sx 12k Gates 208-Pqfp
Manufacturer
Microsemi
Datasheet
1.A54SX08A-PQG208I.pdf
(108 pages)
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Part Number:
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Table 2-17 • A54SX08A Timing Characteristics
2 -2 2
Parameter
Dedicated (Hardwired) Array Clock Networks
t
t
t
t
t
t
f
Routed Array Clock Networks
t
t
t
t
t
t
t
t
t
t
t
HCKH
HCKL
HPWH
HPWL
HCKSW
HP
HMAX
RCKH
RCKL
RCKH
RCKL
RCKH
RCKL
RPWH
RPWL
RCKSW
RCKSW
RCKSW
SX-A Family FPGAs
(Worst-Case Commercial Conditions V
Input Low to High
(Pad to R-cell Input)
Input High to Low
(Pad to R-cell Input)
Minimum Pulse Width High
Minimum Pulse Width Low
Maximum Skew
Minimum Period
Maximum Frequency
Input Low to High (Light Load)
(Pad to R-cell Input)
Input High to Low (Light Load)
(Pad to R-cell Input)
Input Low to High (50% Load)
(Pad to R-cell Input)
Input High to Low (50% Load)
(Pad to R-cell Input)
Input Low to High (100% Load)
(Pad to R-cell Input)
Input High to Low (100% Load)
(Pad to R-cell Input)
Minimum Pulse Width High
Minimum Pulse Width Low
Maximum Skew (Light Load)
Maximum Skew (50% Load)
Maximum Skew (100% Load)
Description
CCA
= 2.25 V, V
Min.
3.2
1.6
1.6
1.6
1.6
–2 Speed
v5.3
Max.
313
1.2
1.0
0.4
0.9
1.5
0.9
1.5
1.1
1.6
0.8
0.8
0.9
CCI
= 4.75 V, T
Min.
1.8
3.6
1.8
1.8
1.8
–1 Speed
Max.
J
278
1.3
1.2
0.4
1.0
1.7
1.0
1.7
1.3
1.8
0.9
1.0
1.0
= 70°C)
Min.
Std. Speed
2.1
2.1
4.2
2.1
2.1
Max.
238
1.5
1.4
0.5
1.2
2.0
1.2
2.0
1.5
2.1
1.1
1.1
1.2
Min.
2.9
2.9
5.8
2.9
2.9
–F Speed
Max.
172
2.3
2.0
0.8
1.7
2.7
1.7
2.7
2.1
2.9
1.5
1.5
1.7
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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