A54SX08-3VQ100I Actel, A54SX08-3VQ100I Datasheet - Page 16
A54SX08-3VQ100I
Manufacturer Part Number
A54SX08-3VQ100I
Description
Semiconductors and Actives, Programmable Logic (FPGAs, PALs, CPLDs ...), fpga
Manufacturer
Actel
Datasheet
1.A54SX08-3VQ100I.pdf
(64 pages)
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A54SX16P DC Specifications (3.3 V PCI Operation)
Table 1-8 •
1 -1 2
Symbol
V
V
V
V
V
I
I
V
V
C
C
C
Notes:
1. This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a
2. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
3. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
4. Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].
IPU
IL
CCA
CCR
CCI
IH
IL
OH
OL
SX Family FPGAs
IN
CLK
IDSEL
floated network. Applications sensitive to static power utilization should assure that the input buffer is conducting minimum current
at this input voltage.
A54SX16P DC Specifications (3.3 V PCI Operation)
Parameter
Supply Voltage for Array
Supply Voltage required for Internal Biasing
Supply Voltage for I/Os
Input High Voltage
Input Low Voltage
Input Pull-up Voltage
Input Leakage Current
Output High Voltage
Output Low Voltage
Input Pin Capacitance
CLK Pin Capacitance
IDSEL Pin Capacitance
1
3
4
2
v3.2
Condition
0 < V
I
I
OUT
OUT
= –500 µA
= 1500 µA
IN
< V
CC
0.5V
0.7V
0.9V
Min.
–0.5
3.0
3.0
3.0
5
CC
CC
CC
V
0.3V
0.1V
CC
Max.
±10
3.6
3.6
3.6
10
12
8
+ 0.5
CC
CC
Units
µA
pF
pF
pF
V
V
V
V
V
V
V
V
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