24LC256T-E/SN15KV05 Microchip, 24LC256T-E/SN15KV05 Datasheet - Page 11

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24LC256T-E/SN15KV05

Manufacturer Part Number
24LC256T-E/SN15KV05
Description
24LC256 Series 256 Kb 2.5 V (32K x 8) 5 ms I2C Serial EEPROM - SOIC-8
Manufacturer
Microchip
Datasheet
7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for
flow diagram.
 2010 Microchip Technology Inc.
ACKNOWLEDGE POLLING
24AA256/24LC256/24FC256
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
Acknowledge
with R/W = 0
Condition to
Did Device
(ACK = 0)?
Send Start
Send Stop
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
YES
DS21203Q-page 11
NO

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