CSPT857CPAG8 IDT, CSPT857CPAG8 Datasheet
CSPT857CPAG8
Specifications of CSPT857CPAG8
Related parts for CSPT857CPAG8
CSPT857CPAG8 Summary of contents
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... PC2700 (DDR333), PC3200 (DDR400) • Along with SSTV16857, SSTVF16857, SSTV16859, SSTVM16859, SSTVF16859, DDR1 register, provides complete solution for DDR1 DIMMs The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES c 2008 Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 2 ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER FUNCTIONAL BLOCK DIAGRAM PWRDWN CLK CLK FBIN FBIN COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES TEST MODE LOGIC AV DD PLL FBOUT FBOUT ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PIN CONFIGURATIONS GND V 4 DDQ V GND 3 DDQ BALL VFBGA PACKAGE LAYOUT COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES PWR GND Y FBIN 7 DWN GND Y V FBIN FBOUT ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PIN CONFIGURATIONS GND DDQ CLK 5 GND 6 CLK V 7 DDQ AGND 9 GND VFQFPN TOP VIEW ABSOLUTE MAXIMUM RATINGS Symbol Rating Supply Voltage Range ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER RECOMMENDED OPERATING CONDITIONS Symbol Parameter AV Supply Voltage DD V I/O Supply Voltage DDQ T Operating Free-Air Temperature A PIN DESCRIPTION (TSSOP/TVSOP) Pin Name Pin Number AGND AV DD CLK, CLK 13, 14 FBIN, FBIN 35, 36 FBOUT, FBOUT 32, 33 GND 18, 24, 25, 31, 41, 42, 48 ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER FUNCTION TABLE (1) INPUTS PWRDWN AV CLK DD GND H L GND (2) Nominal H L (2) Nominal H H (2,3) Nominal X <20MHz NOTES HIGH Voltage Level L = LOW Voltage Level Z = High-Impedance OFF-State X = Don't Care 2. AV nominal is 2.5V for PC1600, PC2100, and PC2700 ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR PC3200 Following Conditions Apply Unless Otherwise Specified: Commercial 0°C to +70°C; Industrial Symbol Parameter V Input Clamp Voltage (All Inputs Static Input LOW Voltage IL (dc) V Static Input HIGH Voltage ...
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... Output Differential Voltage The PLL on the CSPT857 will meet all the above test parameters while supporting SSC synthesizers SSC Modulation Frequency SSC Clock Input Frequency Deviation f PLL Loop Bandwidth 3dB NOTES: 1. Refers to transition of non-inverting output. 2. Static phase offset does not include jitter. ...
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... Output Differential Voltage The PLL on the CSPT857 will meet all the above test parameters while supporting SSC synthesizers SSC Modulation Frequency SSC Clock Input Frequency Deviation f PLL Loop Bandwidth 3dB NOTES: 1. Refers to transition of non-inverting output. 2. Static phase offset does not include jitter. ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS V CSPT857C DDQ Z = 60Ω 60Ω CSPT857C V /2 DDQ COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 60Ω 60Ω SS Figure 1. Output Load R = 10Ω 14pF V /2 DDQ R = 10Ω 14pF ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS Yx, FBOUT Yx, FBOUT CLK CLK FBIN FBIN Yx Yx Yx, FBOUT Yx, FBOUT COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES t t cycle n cycle n jit(cc) cycle n cycle n+1 Figure 3. Cycle-to-Cycle jitter t t (Ø) (Ø)n ∑ ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES t cycle jit(per) = cycle Figure 6. Period jitter t t half period n+1 half period ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS 80% Clock Inputs and Outputs 20% APPLICATION INFORMATION Clock Structure # of SDRAM Loads per Clock #1 #2 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES t R Figure 8. Input and Output Slew Rates 80 20 Clock Loading on the PLL outputs (pF) Min ...
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... IDTCSPT857C 2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER APPLICATION INFORMATION CLK R = 120Ω 14pF CLK ( 120Ω 14pF Feedback path CLK R = 120Ω 14pF CLK ( 120Ω 14pF Feedback path NOTE: 1. Memory module vendors may need to adjust the feedback capacitive load in order to meet DDR SDRAM registered DIMM timing requirements. ...
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... Thin Shrink Small Outline Package PAG TSSOP - Green BV Very Fine Pitch Ball Grid Array BVG VFBGA - Green NL Thermally-Enhanced Plastic Very Fine Pitch Flat No Lead Package NLG VFQFPN - Green 857C 2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 15 for Tech Support: logichelp@idt.com ...