DSPIC33EP128MC506-I/MR Microchip Technology, DSPIC33EP128MC506-I/MR Datasheet - Page 412
DSPIC33EP128MC506-I/MR
Manufacturer Part Number
DSPIC33EP128MC506-I/MR
Description
Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 64P OpAmps
Manufacturer
Microchip Technology
Type
dsPIC33E/PIC24Er
Datasheet
1.DSPIC33EP128MC506-IMR.pdf
(510 pages)
Specifications of DSPIC33EP128MC506-I/MR
Rohs
yes
Core
dsPIC33E
Data Bus Width
16 bit
Program Memory Size
128 KB
Data Ram Size
16 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
53
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
70 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-64
Mounting Style
SMD/SMT
Family / Core
dsPIC33E/PIC24E
Interface Type
CAN, I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
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dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
TABLE 30-17: PLL CLOCK TIMING SPECIFICATIONS
TABLE 30-18: INTERNAL FRC ACCURACY
TABLE 30-19: INTERNAL LPRC ACCURACY
DS70657F-page 412
AC CHARACTERISTICS
OS50
OS51
OS52
OS53
Note 1:
AC CHARACTERISTICS
F21a
F21b
Note 1:
AC CHARACTERISTICS
F20a
F20b
Note 1:
Param
Param
Param
No.
No.
No.
2:
LPRC @ 32.768 kHz
LPRC
LPRC
F
F
T
D
Internal FRC Accuracy @ FRC Frequency = 7.37 MHz
FRC
FRC
Symbol
PLLI
SYS
LOCK
Data in “Typical” column is at 3.3V, +25°C unless otherwise stated. Parameters are for design guidance
only and are not tested.
This jitter specification is based on clock cycle-by-clock cycle measurements. To get the effective jitter for
individual time bases or communication clocks used by the application, use the following formula:
For example, if F
Change of LPRC frequency as V
CLK
Frequency calibrated at 25°C and 3.3V. TUN bits can be used to compensate for temperature drift.
Characteristic
Characteristic
PLL Voltage Controlled
Oscillator (VCO) Input
Frequency Range
On-Chip VCO System
Frequency
PLL Start-up Time (Lock Time)
CLKO Stability (Jitter)
OSC
Characteristic
(1)
= 120 MHz and the SPI bit rate = 10 MHz, the effective jitter is as follows:
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Effective Jitter
Min.
Min.
-0.9
-15
-30
-2
(2)
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
Operating temperature
Effective Jitter
DD
changes.
Typ.
Typ.
0.5
10
1
5
=
-------------------------------------------------------------------------------------------
Min.
120
0.8
0.9
Max.
-3
-------------------------------------------------------------------------------------- -
Time Base or Communication Clock
+0.9
Max.
+15
+30
+2
=
D
------------- -
CLK
120
-------- -
-40°C T
-40°C T
10
-40°C T
-40°C T
Typ.
Units
1.5
0.5
Units
—
—
(1)
%
%
=
%
%
-40°C T
-40°C T
(1)
D
D
------------- -
F
CLK
CLK
12
OSC
A
A
A
A
-40°C T
-40°C T
-40°C T
-40°C T
Max.
+85°C for Industrial
+125°C for Extended
340
8.0
3.1
+85°C for Industrial
+125°C for Extended
3
=
A
A
D
------------- -
3.464
+85°C for Industrial
+125°C for Extended
CLK
2011-2012 Microchip Technology Inc.
Units
A
MHz ECPLL, XTPLL modes
MHz
A
A
A
ms
%
+85°C
+85°C
+125°C V
+125°C V
Conditions
Conditions
V
V
Conditions
DD
DD
DD
DD
= 3.0-3.6V
= 3.0-3.6V
= 3.0-3.6V
= 3.0-3.6V
—
—
—
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