74HC283D,652 NXP Semiconductors, 74HC283D,652 Datasheet

IC 4BIT BINARY FULL ADDER 16SOIC

74HC283D,652

Manufacturer Part Number
74HC283D,652
Description
IC 4BIT BINARY FULL ADDER 16SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet
1.74HC283DB112.pdf (20 pages)

Specifications of 74HC283D,652

Logic Type
Binary Full Adder with Fast Carry
Supply Voltage
2 V ~ 6 V
Number Of Bits
4
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC283D
74HC283D
933757290652
1. General description
2. Features
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC
standard no. 7A.
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)
according to the equation:
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =
= S1 + 2S2 + 4S3 + 8S4 + 16COUT
Where (+) = plus.
Due to the symmetry of the binary add function, the 74HC283 can be used with either all
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
See the 74HC583 for the BCD version.
74HC283
4-bit binary full adder with fast carry
Rev. 03 — 11 November 2004
High-speed 4-bit binary addition
Cascadable in 4-bit increments
Fast internal look-ahead carry
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Product data sheet

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74HC283D,652 Summary of contents

Page 1

Rev. 03 — 11 November 2004 1. General description The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC283 is specified in ...

Page 2

Philips Semiconductors 3. Quick reference data Table 1: GND = Symbol PHL PLH [ input frequency in MHz output ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Functional diagram Fig 3. IEC logic symbol 9397 750 13811 Product data sheet 9 COUT ...

Page 4

Philips Semiconductors CIN Fig 4. Logic diagram 6. Pinning information 6.1 Pinning Fig 5. Pin configuration 9397 750 13811 Product data sheet ...

Page 5

Philips Semiconductors 6.2 Pin description Table 3: Symbol CIN GND COUT Functional description 7.1 Function table [1] Table 4: Function table Pins Input CIN A4 ...

Page 6

Philips Semiconductors 8. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND ...

Page 7

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-level input voltage IH V LOW-level input voltage IL V ...

Page 8

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current LI I quiescent supply current ...

Page 9

Philips Semiconductors 11. Dynamic characteristics Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter amb propagation delay CIN ...

Page 10

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter output transition time THL TLH C power dissipation capacitance PD T ...

Page 11

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +125 C amb propagation delay CIN ...

Page 12

Philips Semiconductors 12. Waveforms Fig 6. Waveforms showing the inputs (CIN, An and Bn) to the outputs (Sn and COUT) Fig 7. Load circuitry for switching times Table 9: Supply V CC 2.0 V 4.5 V 6.0 V 5.0 V ...

Page 13

Philips Semiconductors the second stage on S3. As long as A3 and B3 are the same, HIGH or LOW, they do not influence S3. Similarly, when A3 and B3 are the same, the carry into the third stage does not ...

Page 14

Philips Semiconductors 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 15

Philips Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...

Page 16

Philips Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1.80 mm ...

Page 17

Philips Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 18

Philips Semiconductors 15. Revision history Table 10: Revision history Document ID Release date 74HC283_3 20041111 • Modifications: The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. • Removed ...

Page 19

Philips Semiconductors 16. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 20

Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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