IDT74SSTVN16859PAG IDT, Integrated Device Technology Inc, IDT74SSTVN16859PAG Datasheet

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IDT74SSTVN16859PAG

Manufacturer Part Number
IDT74SSTVN16859PAG
Description
IC BUFFER 13-26BIT SSTL 64-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT74SSTVN16859PAG

Logic Type
13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs
Supply Voltage
2.3 V ~ 2.7 V
Number Of Bits
13, 26
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TSSOP
Logic Family
SSTV
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Inputs
13
Number Of Outputs
26
High Level Output Current
-16mA
Low Level Output Current
16mA
Propagation Delay Time
2.7ns
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
220(Min)MHz
Mounting
Surface Mount
Pin Count
64
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74SSTVN16859PAG
FEATURES:
• 1:2 registered output buffer
• 2.3V to 2.7V operation for PC1600, PC2100, and PC2700
• 2.5V to 2.7V operation for PC3200
• Single bit propagation delay, TSSOP : 2.2ns, VFQFPN : 1.8ns
• SSTL_2 Class I style data inputs/outputs
• Differential CLK input
• RESET control compatible with LVCMOS levels
• Latch-up performance exceeds 100mA
• ESD >2000V per MIL-STD-883, Method 3015; >200V using
• Available in 56 pin VFQFPN and 64 pin TSSOP packages
COMMERCIAL TEMPERATURE RANGE
APPLICATIONS:
• Ideally suited for stacked DIMM DDR registered applications
• Along with CSPT857C/D, Zero Delay PLL Clock buffer, provides
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
IDT74SSTVN16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O
c
machine model (C = 200pF, R = 0)
complete solution for DDR1 DIMMs
2004 Integrated Device Technology, Inc.
RESET
V
CLK
CLK
REF
D
1
51
48
49
45
35
13-BIT TO 26-BIT REGISTERED
BUFFER WITH SSTL I/O
TO 12 OTHER CHANNELS
1
DESCRIPTION:
2.3V-2.7V V
supports low standby operation. All data inputs and outputs are SSTL_2
level compatible with JEDEC standard for SSTL_2.
power-up phase. RESET, which can be operated independent of CLK and
CLK, must be held in the low state during power-up in order to ensure
predictable outputs (low state) before a stable clock has been applied.
registers, and force all outputs to a low state, before a stable clock has been
applied. With inputs held low and a stable clock applied, outputs will remain
low during the Low-to-High transition of RESET.
The SSTVN16859 is a 13-bit to 26-bit registered buffer designed for
RESET is an LVCMOS input since it must operate predictably during the
RESET, when in the low state, will disable all input receivers, reset all
DD
1D
for PC1600 - PC2700 and 2.5V-2.7V V
R
C1
COMMERCIAL TEMPERATURE RANGE
IDT74SSTVN16859
16
32
Q
Q
JANUARY 2004
1A
1B
DD
for PC3200, and
DSC-6836/14

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IDT74SSTVN16859PAG Summary of contents

Page 1

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: • 1:2 registered output buffer • 2.3V to 2.7V operation for PC1600, PC2100, and PC2700 • 2.5V to 2.7V operation for PC3200 • Single bit propagation delay, TSSOP : 2.2ns, ...

Page 2

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O PIN CONFIGURATIONS GND Q 13B V DDQ Q 12B Q 11B Q 10B ...

Page 3

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O PIN DESCRIPTION Pin Names Description Data Output 1 13 GND Ground V Output-stage drain power voltage DDQ V Logic power voltage DD RESET Asynchronous reset input - resets ...

Page 4

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR PC3200 Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70° Symbol Parameter V Control Inputs ...

Page 5

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O TIMING REQUIREMENTS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE RANGE Symbol Parameter Clock Frequency CLOCK tw Pulse Duration, CLK, CLK HIGH or LOW t Differential Inputs Active Time (1) ACT t Differential Inputs ...

Page 6

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O TEST CIRCUITS AND WAVEFORMS FOR PC1600 - PC2700, V FOR PC3200 2.6V ± 0.1V DD LVCMOS RESET Input t INACT I 10% DD (see note 2) ...

Page 7

IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O ORDERING INFORMATION XX XXX IDT74SSTVN Family Device Type XX XX Package Process Blank PA Thin Shrink Small Outline Package PAG TSSOP - Green Thermally Enhanced Plastic Very Fine Pitch NL Quad ...

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