LCMXO640E-4MN132I Lattice, LCMXO640E-4MN132I Datasheet - Page 81

• Manufacturer Part Number: LCMXO640E-4MN132I
• Description: CPLD - Complex Programmable Logic Devices 640 LUTs 101 IO 1.2V -4 Spd I
• Manufacturer: Lattice

Specifications of LCMXO640E-4MN132I

• Rohs: yes
• Memory Type: SRAM
• Number Of Macrocells: 320
• Maximum Operating Frequency: 550 MHz
• Delay Time: 4.2 ns
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Package / Case: CSBGA-132
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 1800
• Supply Current: 14 mA
• Supply Voltage - Max: 1.26 V
• Supply Voltage - Min: 1.14 V

Lattice Semiconductor
Thermal Management
Thermal management is recommended as part of any sound FPGA design methodology. To assess the thermal
characteristics of a system, Lattice specifies a maximum allowable junction temperature in all device data sheets.
Designers must complete a thermal analysis of their specific design to ensure that the device and package do not
exceed the junction temperature limits. Refer to the
specific thermal values.
For Further Information
For further information regarding Thermal Management, refer to the following:
•
• TN1090 -
• Power Calculator tool included with the Lattice ispLEVER design tool, or as a standalone download from 
Thermal Management
www.latticesemi.com/software
Power Estimation and Management for MachXO Devices
document
Thermal Management
4-36
document to find the device/package
MachXO Family Data Sheet
Pinout Information