LCMXO1200E-3MN132C Lattice, LCMXO1200E-3MN132C Datasheet - Page 93

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LCMXO1200E-3MN132C

Manufacturer Part Number
LCMXO1200E-3MN132C
Description
CPLD - Complex Programmable Logic Devices 1200 LUTs 101 IO 1.2 V -3 Spd
Manufacturer
Lattice
Datasheet

Specifications of LCMXO1200E-3MN132C

Rohs
yes
Memory Type
SRAM
Number Of Macrocells
600
Maximum Operating Frequency
500 MHz
Delay Time
5.1 ns
Number Of Programmable I/os
101
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
CSBGA-132
Mounting Style
SMD/SMT
Factory Pack Quantity
1800
Supply Current
18 mA
Supply Voltage - Max
1.26 V
Supply Voltage - Min
1.14 V

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www.latticesemi.com
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
November 2007
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site.
For further information on interface standards refer to the following web sites:
• TN1091,
• TN1089,
• TN1092,
• TN1090,
• TN1086,
• TN1087,
• TN1097,
• AN8066,
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
MachXO sysIO Usage Guide
MachXO sysCLOCK Design and Usage Guide
Memory Usage Guide for MachXO Devices
Power Estimation and Management for MachXO Devices
MachXO JTAG Programming and Configuration User’s Guide
Minimizing System Interruption During Configuration Using TransFR Technology
MachXO Density Migration
Boundary Scan Testability with Lattice sysIO Capability
6-1
MachXO Family Data Sheet
Supplemental Information
DS1002 Further Information_01.2
Data Sheet DS1002

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