LCMXO640E-5MN100C Lattice, LCMXO640E-5MN100C Datasheet - Page 32

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LCMXO640E-5MN100C

Manufacturer Part Number
LCMXO640E-5MN100C
Description
CPLD - Complex Programmable Logic Devices 640 LUTs 74 IO 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LCMXO640E-5MN100C

Rohs
yes
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
600 MHz
Delay Time
3.5 ns
Number Of Programmable I/os
74
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
CSBGA-100
Mounting Style
SMD/SMT
Factory Pack Quantity
1800
Supply Current
14 mA
Supply Voltage - Max
1.26 V
Supply Voltage - Min
1.14 V
Lattice Semiconductor
sysIO Recommended Operating Conditions
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
LVCMOS 1.5
LVCMOS 1.2
LVTTL
PCI
LVDS
LVPECL
BLVDS
RSDS
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers
3. Input on the top bank of the MachXO1200 and MachXO2280 only.
3
Standard
1, 2
1
1
1
3.135
2.375
1.425
3.135
3.135
2.375
3.135
2.375
2.375
Min.
1.71
1.14
3-6
V
CCIO
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
2.5
3.3
2.5
2.5
(V)
DC and Switching Characteristics
MachXO Family Data Sheet
3.465
2.625
1.575
3.465
3.465
2.625
3.465
2.625
2.625
Max.
1.89
1.26

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