LCMXO640E-5FN256C Lattice, LCMXO640E-5FN256C Datasheet - Page 54

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LCMXO640E-5FN256C

Manufacturer Part Number
LCMXO640E-5FN256C
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640E-5FTN25
Manufacturer
Lattice
Datasheet

Specifications of LCMXO640E-5FN256C

Rohs
yes
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
600 MHz
Delay Time
3.5 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
14 mA
Supply Voltage - Max
1.26 V
Supply Voltage - Min
1.14 V
Lattice Semiconductor
LCMXO1200 and LCMXO2280 Logic Signal Connections: 100 TQFP (Cont.)
Number
47***
50**
76**
Pin
42
43
44
45
46
48
49
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
77
78
79
80
81
Function
SLEEPN
GNDIO3
GNDIO4
GNDIO1
GNDIO2
VCCIO4
VCCIO3
VCCIO2
VCCIO1
PR16B
PR15B
PR15A
PR14B
PR14A
PR12B
PR12A
PR10B
PR10A
PB10A
PB10B
PB11A
PB11B
PT11C
PT11B
PT11A
PR6C
PR4D
PB9A
PB9B
PR9B
PR9A
PR8B
PR8A
PR6B
PR6A
PR4B
PR4A
PR2B
PR2A
PT9E
GND
VCC
Ball
Bank
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
-
-
-
-
-
LCMXO1200
Function
SLEEPN
Dual
Differential
C*
C*
C*
C*
C*
C*
C*
C*
T*
T*
T*
T*
T*
T*
T*
T*
C
C
C
C
C
T
T
T
T
T
4-9
Function
SLEEPN
GNDIO3
GNDIO4
GNDIO1
GNDIO2
VCCIO4
VCCIO3
VCCIO2
VCCIO1
PR19B
PR18B
PR18A
PR17B
PR17A
PR15B
PR15A
PR13B
PR13A
PR11B
PR11A
PR10B
PR10A
PB12A
PB12B
PB13A
PB13B
PB16A
PB16B
PT15C
PT14B
PT14A
PT12D
PR8C
PR5D
PR8B
PR8A
PR5B
PR5A
PR3B
PR3A
GND
VCC
Ball
Bank
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
-
-
-
-
-
MachXO Family Data Sheet
LCMXO2280
Function
SLEEPN
Dual
Pinout Information
Differential
C*
C*
C*
C*
C*
C*
C*
C*
C*
T*
T*
T*
T*
T*
T*
T*
T*
T*
C
C
C
C
C
T
T
T
T

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