LPC1111FHN33/203,5 NXP Semiconductors, LPC1111FHN33/203,5 Datasheet - Page 169
LPC1111FHN33/203,5
Manufacturer Part Number
LPC1111FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 8kB flash up to 4 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1111FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1111
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
8 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
42
Number Of Timers
4
Program Memory Type
Flash
Factory Pack Quantity
260
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Table 167. LPC1112/14 pin description table (TSSOP28 and DIP28 packages)
UM10398
User manual
Symbol
R/PIO0_11/
AD0/CT32B0_MAT3
PIO1_0 to PIO1_9
R/PIO1_0/
AD1/CT32B1_CAP0
R/PIO1_1/
AD2/CT32B1_MAT0
R/PIO1_2/
AD3/CT32B1_MAT1
SWDIO/PIO1_3/
AD4/CT32B1_MAT2
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
PIO1_5/RTS/
CT32B0_CAP0
4
9
10
11
12
13
14
[5]
[5]
[5]
[5]
[5]
[5]
[3]
Start
logic
input
yes
yes
no
no
no
no
no
Chapter 10: LPC111x Pin configuration (LPC1100L series, TSSOP, DIP,
Type Reset
I
I/O
I
O
I/O
I
I/O
I
I
O
I/O
I
O
I
I/O
I
O
I/O
I/O
I
O
I/O
I
O
I
I/O
O
I
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
I; PU
I; PU
I; PU
I; PU
I; PU
state
[1]
I; PU
-
-
-
I; PU
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Description
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO0_11 — General purpose digital input/output pin.
AD0 — A/D converter, input 0.
CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
Port 1 — Port 1 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 1 pins depends
on the function selected through the IOCONFIG register block.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_0 — General purpose digital input/output pin.
AD1 — A/D converter, input 1.
CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_1 — General purpose digital input/output pin.
AD2 — A/D converter, input 2.
CT32B1_MAT0 — Match output 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_2 — General purpose digital input/output pin.
AD3 — A/D converter, input 3.
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output.
PIO1_3 — General purpose digital input/output pin.
AD4 — A/D converter, input 4.
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4 — General purpose digital input/output pin with 10 ns
glitch filter.
AD5 — A/D converter, input 5.
CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
WAKEUP — Deep power-down mode wake-up pin with 20 ns
glitch filter. This pin must be pulled HIGH externally to enter Deep
power-down mode and pulled LOW to exit Deep power-down
mode. A LOW-going pulse as short as 50 ns wakes up the part.
PIO1_5 — General purpose digital input/output pin.
RTS — Request To Send output for UART.
CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.
…continued
UM10398
© NXP B.V. 2012. All rights reserved.
169 of 538
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