MK22DX128VMC5 Freescale Semiconductor, MK22DX128VMC5 Datasheet - Page 42

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MK22DX128VMC5

Manufacturer Part Number
MK22DX128VMC5
Description
ARM Microcontrollers - MCU ARM+128KB +USB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK22DX128VMC5

Rohs
yes
Core
ARM Cortex M4
Processor Series
K20
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
MAPBGA-121
Mounting Style
SMD/SMT
A/d Bit Size
16 bit
Interface Type
I2C, I2S, SPI, UART, USB
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
4
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.71 V
Communication interfaces
4.5.6.5 Carrier Modulator Timer (CMT)
4.5.6.6 Real-Time Clock (RTC)
4.5.7
4.5.7.1 USB On-The-Go Module (FS/LS)
42
• Selectable clock for prescaler/glitch filter
• Configurable glitch filter or prescaler
• Interrupt generated on timer compare
• Hardware trigger generated on timer compare
• Four modes of operation
• Extended space operation in time, baseband, and FSK modes
• Selectable input clock divider
• Interrupt on end of cycle
• Ability to disable CMT_IRO signal and use as timer interrupt
• Independent power supply, POR and 32 kHz crystal oscillator
• 32-bit seconds counter with 32-bit alarm
• 16-bit prescaler with compensation
• Register write protection
• Complies with USB specification rev 2.0
• USB host mode
• USB device mode
• Suspend mode/low power
• Includes an on-chip full-speed (12 Mbps) and low-speed (1.5 Mbps) transceiver
• 1 kHz internal LPO
• External low power crystal oscillator
• Internal reference clock (not available in low leakage power modes)
• Secondary external reference clock (for example, 32 kHz crystal)
• Time with independent control of high and low times
• Baseband
• Frequency shift key (FSK)
• Direct software control of CMT_IRO signal
• Hard Lock requires VBAT POR to enable write access
• Soft lock requires system reset to enable write/read access
• Supports enhanced-host-controller interface (EHCI)
• Allows direct connection of FS/LS devices without an OHCI/UHCI companion controller
• Supported by Linux and other commercially available operating systems
• Full-speed operation via the on-chip transceiver
• Supports one upstream facing port
• Supports four programmable, bidirectional USB endpoints, including endpoint 0
• As host, firmware can suspend individual devices or the entire USB and disable chip clocks for low-power
• Device supports low-power suspend
• Remote wake-up supported for host and device
• Integrated with the processor’s low power modes
Communication interfaces
operation
K20 Family Product Brief, Rev. 11, 08/2012
Freescale Semiconductor, Inc.

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