Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 169

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Caution:
Page Erase
Mass Erase
Flash Controller Bypass
The Flash memory can be erased one page (512 bytes) at a time. Page Erasing the Flash
memory sets all bytes in that page to the value
fies the page to be erased. Only a page residing in an unprotected sector can be erased.
With the Flash Controller unlocked and the active page set, writing the value
Flash Control Register initiates the Page Erase operation. While the Flash Controller exe-
cutes the Page Erase operation, the eZ8 CPU idles but the system clock and on-chip
peripherals continue to operate. The eZ8 CPU resumes operation after the Page Erase
operation completes. If the Page Erase operation is performed using the On-Chip Debug-
ger, poll the Flash Status Register to determine when the Page Erase operation is complete.
When the Page Erase is complete, the Flash Controller returns to its locked state.
The Flash memory can also be Mass Erased using the Flash Controller, but only by using
the On-Chip Debugger. Mass Erasing the Flash memory sets all bytes to the value
With the Flash Controller unlocked and the Mass Erase successfully enabled, writing the
value
Flash Controller executes the Mass Erase operation, the eZ8 CPU idles but the system
clock and on-chip peripherals continue to operate. Using the On-Chip Debugger, poll the
Flash Status Register to determine when the Mass Erase operation is complete. When the
Mass Erase is complete, the Flash Controller returns to its locked state.
The Flash Controller can be bypassed and the control signals for the Flash memory
brought out to the GPIO pins. Bypassing the Flash Controller allows faster Row Program-
ming algorithms by controlling the Flash programming signals directly.
Row programming is recommended for gang programming applications and large volume
customers who do not require in-circuit initial programming of the Flash memory. Page
Erase operations are also supported when the Flash Controller is bypassed.
For more information about bypassing the Flash Controller, refer to the
Programming Support for Z8 Encore! MCUs Application Note
able for download on www.zilog.com.
The byte at each address of the Flash memory cannot be programmed (any bits written
to 0) more than twice before an erase cycle occurs. Doing so may result in corrupted data
at the target byte.
63H
to the Flash Control Register initiates the Mass Erase operation. While the
P R E L I M I N A R Y
FFH
. The Flash Page Select Register identi-
Z8 Encore! XP
(AN0117), which is avail-
Product Specification
Third-Party Flash
®
F082A Series
95h
Operation
to the
FFH
.
152