Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 202

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Caution:
OCD Unlock Sequence (8-Pin Devices Only)
Breakpoints
Serial Break leaves the device in DEBUG Mode if that is the current mode. The OCD is
held in Reset until the end of the Serial Break when the DBG pin returns High. Because of
the open-drain nature of the DBG pin, the host can send a Serial Break to the OCD even if
the OCD is transmitting a character.
Because of pin-sharing on the 8-pin device, an unlock sequence must be performed to
access the DBG pin. If this sequence is not completed during a system reset, then the PA0/
DBG pin functions only as a GPIO pin.
The following sequence unlocks the DBG pin:
1. Hold PA2/RESET Low.
2. Wait 5ms for the internal reset sequence to complete.
3. Send the following bytes serially to the debug pin:
4. Release PA2/RESET. The PA0/DBG pin is now identical in function to that of the
Execution Breakpoints are generated using the BRK instruction (opcode
eZ8 CPU decodes a BRK instruction, it signals the On-Chip Debugger. If Breakpoints are
enabled, the OCD enters DEBUG Mode and idles the eZ8 CPU. If Breakpoints are not
Between
SET nor DEBUG Mode. If a device has been erased or has not yet been programmed, all
program memory bytes contain
tion; therefore some irregular behavior can occur before entering DEBUG Mode, and the
register values after entering DEBUG Mode will differ from their specified reset values.
However, none of these irregularities prevent the programming of Flash memory. Before
beginning system debug, Zilog recommends that some legal code be programmed into
the 8-pin device and that a RESET occurs.
DBG
DBG
DBG
DBG
DBG
DBG pin on the 20-/28-pin device. To enter DEBUG Mode, reautobaud and write
to the OCD Control Register (see the
page 186).
←
←
←
←
←
5AH
70H
CDH (32-bit unlock key)
Steps 3
80H (autobaud)
EBH
and 4, there is an interval during which the 8-pin device is neither in RE-
P R E L I M I N A R Y
FFH
. The CPU interprets this value as an illegal instruc-
On-Chip Debugger Commands
Z8 Encore! XP
Product Specification
®
00H
section on
F082A Series
). When the
Operation
80H
185