LCMXO2-256ZE-2SG32CES Lattice, LCMXO2-256ZE-2SG32CES Datasheet - Page 53
LCMXO2-256ZE-2SG32CES
Manufacturer Part Number
LCMXO2-256ZE-2SG32CES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
Manufacturer
Lattice
Datasheet
1.LCMXO2-256HC-4SG32I.pdf
(106 pages)
Specifications of LCMXO2-256ZE-2SG32CES
Rohs
yes
Maximum Operating Frequency
125 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
0 C
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Typical Building Block Function Performance – HC/HE Devices
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Register-to-Register Performance
Basic Functions
16-bit decoder
4:1 MUX
16:1 MUX
Basic Functions
16:1 MUX
16-bit adder
16-bit counter
64-bit counter
Embedded Memory Functions
1024x9 True-Dual Port RAM
(Write Through or Normal, EBR output registers)
Distributed Memory Functions
16x4 Pseudo-Dual Port RAM (one PFU)
1. The above timing numbers are generated using the Diamond design tool. Exact performance may vary
with device and tool version. The tool uses internal parameters that have been characterized but are not
tested on every device.
Function
Function
3-14
-6 Timing
-6 Timing
DC and Switching Characteristics
412
297
324
161
183
500
8.9
7.5
8.3
MachXO2 Family Data Sheet
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
1
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