1893CY-10LF IDT, 1893CY-10LF Datasheet - Page 101
1893CY-10LF
Manufacturer Part Number
1893CY-10LF
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893CFLF.pdf
(121 pages)
Specifications of 1893CY-10LF
Rohs
yes
Part # Aliases
ICS1893CY-10LF
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9.5.3 Timing for Receive Clock (RXCLK) Pins
ICS1893CK-40, Rev. C, 06/02/09
Table 9-10
interfaces.
Table 9-10. MII Receive Clock Timing
Figure 9-4. Receive Clock Timing Diagram
RXCLK
Period
Time
t2a
t2b
t1
ICS1893CK-40 Data Sheet Rev. C - Release
RXCLK Duty Cycle
RXCLK Period
RXCLK Period
Figure 9-4
lists the significant time periods for signals on the Receive Clock (RXCLK) pins for the various
Parameter
shows the timing diagram for the time periods.
t1
Copyright © 2009, Integrated Device Technology, Inc.
t2
100M MII (100Base-TX)
10M MII (10Base-T)
All rights reserved.
101
Conditions
–
Chapter 9 DC and AC Operating Conditions
Min. Typ. Max.
35
–
–
400
50
40
65
–
–
June 2009
Units
ns
ns
%
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