92HD66C1X3NDGXZBX8 IDT, 92HD66C1X3NDGXZBX8 Datasheet - Page 28
92HD66C1X3NDGXZBX8
Manufacturer Part Number
92HD66C1X3NDGXZBX8
Description
Interface - CODECs
Manufacturer
IDT
Datasheet
1.92HD66C1X3NDGXZBX8.pdf
(291 pages)
Specifications of 92HD66C1X3NDGXZBX8
Rohs
yes
Part # Aliases
IDT92HD66C1X3NDGXZBX8
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92HD66C
SIX CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
IDT CONFIDENTIAL
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
2.20. Analog PC-Beep
Microphones
Microphones
Digital
Digital
DMIC_CLK
DMIC_0
DMIC_1
The codec supports automatic routing of the PC_Beep pin to several outputs when the HD-Link is in
reset. The codec will route PC_Beep to ports A, B, and F by default when reset is applied. To prevent
pops, beep is not enabled immediately when power is applied. 92HD90 will mute outputs and wait
until references and amplifiers have stabilized before enabling beep pass thru after power on reset.
To prevent pops when removing power, automatic routing of PC_Beep is not supported in D3cold,
D4, or D5.
Note: Some Digital Microphone Implementations support data on either edge, in this case the
external multiplexer is not required.
Multiplexer
Multiplexer
External
External
DMIC_CLK
Figure 6. Quad Digital Microphone Configuration
Off-Chip
DMIC_0
DMIC_1
Channel
Right
Pin
Pin
Pin
Data R0
Data R1
Valid
Valid
On-Chip
Channel
Data L0
Data L1
Valid
Valid
Left
Multiplexer
Multiplexer
On-Chip
On-Chip
Channel
Right
Data R0
Data R1
Valid
Valid
28
Data L0
Data L1
Valid
Valid
Channel
Left
STEREO
STEREO
ADC0
ADC1
PCM
PCM
Data R0
Data R1
Valid
Valid
Stereo Channels
Stereo Channels
DMIC_0 L&R
DMIC_1 L&R
Output For
Output For
V 1.0 2/12
92HD66C
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