74ACT573SC_Q Fairchild Semiconductor, 74ACT573SC_Q Datasheet
74ACT573SC_Q
Specifications of 74ACT573SC_Q
Related parts for 74ACT573SC_Q
74ACT573SC_Q Summary of contents
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... N20A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs ...
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... Enable (OE) input. When OE is LOW, the buffers are enabled. When OE is HIGH the buffers are in the high impedance mode but this does not interfere with entering new data into the latches. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 Logic Symbols Truth Table ...
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... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 3 www.fairchildsemi.com ...
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... V Output Voltage O T Operating Temperature Minimum Input Edge Rate, AC Devices: V from 30 Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA –0. 0.5V CC – ...
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... All outputs loaded; thresholds on input associated with output under test and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6 (V) Conditions Typ ...
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... Minimum Dynamic OLD (5) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6 (V) Conditions Typ. CC 4.5 V 0.1V or 1.5 ...
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... Parameter t Setup Time, HIGH or LOW Hold Time, HIGH or LOW Pulse Width, HIGH W Note: 7. Voltage range 5.0 is 5.0V ± 0.5V. Voltage range 3.3 is 3.3V ± 0.3V. ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 T +25° 50pF L (6) V (V) Min. Typ. Max. CC 3.3 0.5 8.5 10 ...
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... Hold Time, HIGH or LOW Pulse Width, HIGH W Note: 9. Voltage range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD AC ACT ©1988 Fairchild Semiconductor Corporation 74AC573, 74ACT573 Rev. 1.6.0 T +25° 50pF L (8) V (V) Min. Typ. Max. CC 5.0 2.5 6.0 10.5 5.0 3.0 6 ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...