MAX9157EGJ-T Maxim Integrated, MAX9157EGJ-T Datasheet - Page 12
MAX9157EGJ-T
Manufacturer Part Number
MAX9157EGJ-T
Description
LVDS Interface IC Quad Bus LVDS Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.MAX9157EHJ.pdf
(16 pages)
Quad Bus LVDS Transceiver
Figure 8. Receiver Transition Time and Propagation Delay Timing Diagram
Figure 9. Receiver High-Impedance Delay Test Circuit
Figure 10. Receiver High-Impedance Waveforms
12
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DO_+/RIN_+
DO_-/RIN_-
RO_
V
V
ID
ID
RO_ WHEN
RO_ WHEN
= +100mV
= -100mV
RE_
50%
t
t
PLZ
PHZ
GENERATOR
C
S
S
20%
V
1
1
L
t
CM
PLHD
= V
= GND FOR t
INCLUDES LOAD AND TEST JIG CAPACITANCE.
0.5V
CC
0.5V
FOR t
t
TLH
RE_
PZL
50Ω
PZH
DO_+/RIN_+
AND t
DO_-/RIN_-
AND t
80%
50%
1/4 MAX9157
PLZ
PHZ
MEASUREMENTS.
MEASUREMENTS.
V
50%
ID
V
CC
S
1
t
t
PZL
PZH
R
C
L
L
RO_
50%
50%
80%
V
t
CM
PHLD
t
THL
50%
20%
V
0
V
V
V
GND
CC
CC
OL
OH
V
V
OH
OL