74HC08PW NXP Semiconductors, 74HC08PW Datasheet

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74HC08PW

Manufacturer Part Number
74HC08PW
Description
Logic Gates QUAD 2-INPUT AND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC08PW

Product Category
Logic Gates
Rohs
yes
Product
AND
Logic Family
HC
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
7 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-402
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
96
Part # Aliases
74HC08PW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC08PW
Manufacturer:
PHILIPS
Quantity:
2 448
Part Number:
74HC08PW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74HC08PW
Quantity:
8 115
Part Number:
74HC08PW-Q100
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
Part Number:
74HC08PW/S400
Manufacturer:
NXP
Quantity:
69 000
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74HC08N
74HCT08N
74HC08D
74HCT08D
74HC08DB
74HCT08DB
74HC08PW
74HCT08PW
74HC08BQ
74HCT08BQ
Ordering information
Package
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
74HC08; 74HCT08
Quad 2-input AND gate
Rev. 4 — 6 September 2012
Complies with JEDEC standard JESD7A
Complies with JEDEC standard JESD8-1A
Input levels:
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
.
For 74HC08: CMOS level
For 74HCT08: TTL level
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Name
DIP14
SO14
SSOP14
TSSOP14
DHVQFN14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5  3  0.85 mm
Product data sheet
SOT27-1
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1

Related parts for 74HC08PW

74HC08PW Summary of contents

Page 1

... Name Description DIP14 plastic dual in-line package; 14 leads (300 mil) SO14 plastic small outline package ...

Page 2

... NXP Semiconductors 4. Functional diagram mna222 Fig 1. Logic symbol 5. Pinning information 5.1 Pinning +& +&7 < < *1' DDD Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 74HC_HCT08 Product data sheet 1 & & ...

Page 3

... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin 10, GND Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4 ...

Page 4

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions ...

Page 5

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance 74HCT08 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage = 20  4.0 mA ...

Page 6

... NXP Semiconductors Table 7. Dynamic characteristics GND = pF; for load circuit see L Symbol Parameter Conditions C power dissipation per package capacitance 74HCT02 t propagation delay nA nY; see transition time power dissipation per package; PD capacitance the same as t and t ...

Page 7

... NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching times Table 9. Test data Type Input V I 74HC08 V CC 74HCT08 3.0 V 74HC_HCT08 Product data sheet ...

Page 8

... NXP Semiconductors 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 9

... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 10

... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 10 ...

Page 11

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 12

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 13

... Document ID Release date 74HC_HCT08 v.4 20120906 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT08 v.3 20030725 74HC_HCT08_CNV v.2 19970826 74HC_HCT08 Product data sheet ...

Page 14

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 15

... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 16

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Abbreviations ...

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