AT28C64B-15PU Atmel, AT28C64B-15PU Datasheet

IC EEPROM 64KBIT 150NS 28DIP

AT28C64B-15PU

Manufacturer Part Number
AT28C64B-15PU
Description
IC EEPROM 64KBIT 150NS 28DIP
Manufacturer
Atmel

Specifications of AT28C64B-15PU

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
150ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Organization
8 K x 8
Interface Type
Parallel
Access Time
150 ns
Output Enable Access Time
70 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
40 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
10 μA
Current, Operating
40 mA
Current, Output, Leakage
10
Data Retention
10 yrs.
Density
64K
Package Type
PDIP
Power Dissipation
220 mW
Temperature, Operating
-40 to +85 °C
Time, Access
150 ns
Time, Address Hold
50
Voltage, Input, High
2 V
Voltage, Input, Low
0.8 V
Voltage, Output, High
2.4 V
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Memory Configuration
8K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
28
Rohs Compliant
Yes
Operating Temperature Range
-40°C
Ic Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
1. Description
The AT28C64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28C64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
Atmel’s AT28C64B has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 150 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Commercial and Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 10 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
2 ms Maximum (Option)
64K (8K x 8)
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28C64B
0270J–PEEPR–04/05

Related parts for AT28C64B-15PU

AT28C64B-15PU Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... GND 14 15 2.2 32-lead PLCC Top View I/O0 13 Note: PLCC package pins 1 and 17 are Don’t Connect. AT28C64B 2 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect 2.3 OE VCC A11 A11 WE OE VCC A10 NC CE ...

Page 3

... Read The AT28C64B is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-impedance state when either high. This dual line control gives designers flexibility in preventing bus contention in their systems ...

Page 4

... AT28C64B will be protected against inadvertent writes. It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28C64B by preceding the data to be written by the same 3-byte command sequence used to enable SDP. Once set, SDP remains active unless the disable command sequence is issued. Power transi- tions do not disable SDP, and SDP protects the AT28C64B during power-up and power-down conditions ...

Page 5

... Com., Ind 2. MHz OUT -400 µA OH AT28C64B AT28C64B-25 0°C - 70°C -40°C - 85°C 5V ±10 High High Z V High Z IL Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 6

... Max 150 150 (1)(2)(3)(4) ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28C64B-20 AT28C64B-25 Min Max Min 200 200 OUTPUT VALID . ACC after an address change CE ACC OE Max Units ...

Page 7

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 0270J–PEEPR–04/ < Max 6 12 AT28C64B Units Conditions OUT 7 ...

Page 8

... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28C64B 8 t OES OES Min Max 100 ...

Page 9

... A6 through A12 must specify the same page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. 18. Chip Erase Waveforms (min 12.0V ±0.5V H 0270J–PEEPR–04/05 (1)(2) t WPH VALID ADD t DS VALID DATA µs (min.) AT28C64B Min Max 100 150 50 t BLC Units µ ...

Page 10

... A6 - A12 DATA Notes through A12 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28C64B 10 20. Software Data Protection Disable (2) Notes: t WPH ...

Page 11

... Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 0270J–PEEPR–04/05 (1) See “AC Read Characteristics” on page 6. t OEH t OE (1) (1)(2)( OEH OEHP AT28C64B Min Typ Max Min Typ Max 10 10 150 Units ...

Page 12

... Normalized I Graphs CC AT28C64B 12 0270J–PEEPR–04/05 ...

Page 13

... AT28C64B-15PC AT28C64B-15SC AT28C64B-15TC AT28C64B-15JI AT28C64B-15PI AT28C64B-15SI AT28C64B-15TI AT28C64B-20JC AT28C64B-20PC AT28C64B-20SC AT28C64B-20TC AT28C64B-20JI AT28C64B-20PI AT28C64B-20SI AT28C64B-20TI AT28C64B-25JC AT28C64B-25PC AT28C64B-25SC AT28C64B-25TC AT28C64B-25JI AT28C64B-25PI AT28C64B-25SI AT28C64B-25TI Ordering Code AT28C64B-15JU AT28C64B-15SU AT28C64B-15TU Package Type AT28C64B Package Operation Range 32J 28P6 Commercial 28S (0°C to 70°C) ...

Page 14

... The following table lists standard Atmel products that can be ordered. Device Numbers Speed AT28C64B 15 AT28C64B 20 AT28C64B 25 AT28C64B – 29. Die Products Reference Section: Parallel EEPROM Die Products AT28C64B 14 Package and Temperature Combinations JC, JI, JU, PC, PI, SC, SI, SU, TC, TI, TU JC, JI, PC, PI, SC, SI, TC, TI JC, JI, PC, PI, SC, SI, TC 0270J–PEEPR–04/05 ...

Page 15

... Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R 0270J–PEEPR–04/05 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) AT28C64B 0.318(0.0125) 0.191(0.0075 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 3.175 – ...

Page 16

... PDIP A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AB. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 16 D PIN 0º ~ 15º REF eB TITLE 28P6, 28-lead (0.600" ...

Page 17

... PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 AT28C64B 10.65(0.419) 10.00(0.394) 2.65(0.1043) 2.35(0.0926) SIDE VIEWS 0.32(0.0125) 0.23(0.0091) DRAWING NO. 28S 8/4/03 REV ...

Page 18

... E Notes: 1. This package conforms to JEDEC reference MO-183. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 18 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) 0º ...

Page 19

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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