E909.06A61DC ELMOS Semiconductor, E909.06A61DC Datasheet

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... AN - LED1 LED2 LED3 LED4 LEDC ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Applications ÿ Optical or capacitive input devices ÿ Proximity and gesture detection ÿ Compact HMI interfaces for one-dimensional up to ...

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... TM0 A_IO 32 VPP HV_S Digital Analog Supply Input Output High Voltage ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Pull ESD Description Down +/- 2KV HBM General Purpose IO 7 ...

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... Package is according JEDEC MO-220-K, version VHHD-4. AN AVSS AMP_AN NRST TMODE TM1 TMO VPP Figure 1: Package Pinout ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor LEDC 25 16 ...

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... All voltages are referred and currents are positive when flowing into the node unless otherwise specified. SS ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Referenced ...

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... In application mode the current consumption is calculated from the duty cycle of the digital operating current and the analog operating current. MCR - Measurement Configuration Register PCR - Preamplifier Configuration Register ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min ...

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... Will not be tested in production test 3.3 Internal Clock Generation 3.3.1 Reference Clocks No. Description Wakeup clock frequency 1 2 Master clock ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min. Reference POR ...

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... Bus free time between STOP 18 and START 1) Pulse with of spikes which 19 must be suppressed by the IC-internal input filter 1) Will not be tested in production test ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min ...

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... DAC resolution 1 2 Integral non linearity (INL) Differential non linearity 3 (DNL) DAC output voltage at full 4 scale ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min. Tck transfer 4 start of Tcs1 ...

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... Stepsize for DC-bias current Max. DC-bias current 10 (DC_OFFSET the maximum current selected with parameter RANGE R_MAXS ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min. I DAC = 0 R_MINS ...

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... Capacitance of photo diode 19 at input KA 20 Internal reference voltage 21 Internal reference current PCR - Preamplifier Configuration Register ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Condition Symbol Min ...

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... As external reset source a reset input will be considered. The system clock is generated by an on-chip oscillators. A more detailed diagram of the clock/reset generation block (CRG) is shown in the following sections. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Data Sheet 11/71 E909 ...

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... VDDIO and AVDD/DVVC are stabilized on its potential. A >= 0ms B > 5ms (recommended) To avoid floating gates, A < 100µs is recommended. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Peripherie RAM ...

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... Brown Out Detection 4.3.1 Timing Diagram VDDC/AVDD VDDC/AVDD VBOHL VDDmin Figure 4: Brown-Out timing diagram ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG 2.5V (AVDD / VDDC) Reset Brown-Out Black-Out Undefined Behaviour Data Sheet 13/71 E909 ...

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... CPU register parity error - Watchdog timeout - Uncorrectable trim register ECC error NRST_PADin Figure 5: Timing of the external reset signal ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG TDEB_NRST NRST_DEB Filtered by Debouncer ...

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... Invalid module register access detection Watchdog time-out Watchdog window protection Brownout detection (supply voltage monitoring) System clock monitoring ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Brown Out Is not detected End of Power-On-Reset ...

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... ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG ...

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... STRTCNT: Startup counter - value from the integrator (range: 0 ... 1023) reset value: 0x0000 Table 1: Start Value Counter ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Address 0x00 ...

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... Note: not available in version 1 and version Polarity of LED2 Modulator clock ('0' = normal, '1' = inverted Polarity of LED1 Modulator clock ('0' = normal, '1' = inverted) Table 3: Measurement Configuration HALIOS® Clock ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... R R External access 11:8 : DC_OFFSET current LEDC (4 Bit) Bit Description 6:0 : OFFSET compensation LEDC Table 6: Current Configuration Compensator Offset ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG 9 ...

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... CLHALI: Clear HALIOS® interrupt influence 1 - clear HALIOS® interrupt Bit Description 0 : HALIE: HALIOS® interrupt enable interrupt disabled 1 - interrupt enabled Table 9: Interrupt ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG 9 ...

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... SCI can be mapped to the IO port or to the D2D port. Furthermore a 32 bit timer and a watchdog are included. As the system clock source either an on-chip oscillator or a crystal oscillator can be selected. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG ...

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... All breakpoints can be used for stepping and run-stop a program 5.3 CPU Registers The EL16 contains 16 registers (R0 to R15) including Program Counter, Stack Pointer and Status Register. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG reset ...

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... This bit is set when the result of an arithmetic operation overflows the signed-variable range. CLKOFF: Stop flag CPU clock gated CPUOFF: Standby flag CPU halted ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Address SR/R2 12 ...

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... The twelve registers, R4-R15, are general-purpose registers. All of these registers can be used as data registers or address pointers and can be used with byte or word instructions. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG ...

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... The source and destination of an instruction are defined by the following fields: Abbr. src dst As S-reg Ad D-reg B/W ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Syntax Description Rn Register contents are operand ( point to the operand stored in the X(Rn) next word. ...

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... Figure 9: Coding of the 16 bit op-code ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Exclusive OR source and destination ** emulated instruction Figure 10: Instruction Set of EL16 ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG dst + C -> dst src + dst -> dst src + dst + C -> dst src AND dst -> ...

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... Figure 11: EL16 Instruction Cycle Counts SINGLE includes RRC, RRA, SWPB and SXT DOUBLE includes all double operand instructions except MOV ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG cycles cycles(dreg==PC) ...

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... Modules 0x0000 Figure 12: Memory Map ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG V1 DESIGN IDENT MEMORY PROTECTION ANALOG CONTROL FLASH CONTROL I²C IRQ CONTROL ...

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... Base address 0xC000 0x1000 0x0C00 0x0400 Base address 0xE000 0x1000 0x0E00 0x0400 ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Size Module name 0xF000 FLASH address 0x0C00 SRAM address 0x0200 reserved ...

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... All information are read only. 5.7.1 Design Ident Module Registers Register Name Design Ident 0 Design Ident 1 Design Ident 2 Design Ident 3 Version ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor Address 0x00 0x02 ...

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... Reset value Internal access External access Bit Description 15:0 : Design Ident 3 Table 16: Design Ident 3 ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Op-code execute enable 1 Op-code execute enable 2 Op-code execute enable 3 Failure address value Stack enable Invalid address value Interrupt clear ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Bit Description enable 0 - execution of op-code denied 1 - execution of op-code allowed area size: 1 KByte reset value: 0xFFFF Table 20: Op-code execute enable 2 ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... area 0x0F00 to 0x0FFE to Bit Description 1 : area 0x0500 to 0x05FE 0 : area 0x0400 to 0x04FE reset value: 0x0FFF Table 23: Stack enable ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Register Name Wake-up timer config Reset source status Reset source status clear Wake-up timer interrupt status Wake-up timer interrupt clear ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... External access 0 : clears all reset status bits Bit Description influence 1 - clears all reset status bits Table 28: Reset source status clear ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Area protection (areas Area protection (areas 8 - 14) Mode Status IRQ clear Bit error corrected address Word config Frequency config ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... FLASH main block areas (each 4 Kbyte) area 8: 0x9000 - 0x9FFF area 14: 0xF000 - 0xFFFF reset value: 0x9600 Table 32: Area protection (areas 8 - 14) ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Table 34: Status ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Bit Description 1: 2 words ... 31: 32 words (default, a complete row) reset value: 0x961F Table 37: Word config ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Table 38: Frequency config 5.11 I²C Interface 5.11.1 I²C Block Diagram SCLIN SCL SCLOUT SDAIN SDA SDAOUT Figure 13: I²C Block Diagram ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... External access R R 7:0 : receive data Bit Description (see Data FIFO Registers for details) Table 39: Receive Data FIFO Register ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor SU:DAT HD:DAT ...

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... Wake-up mode enable bit 0 - wake-up mode disabled Bit Description 1 - wake-up mode enabled 6:4 : Fill level of receive FIFO 2:0 : Fill level of send FIFO Table 42: Status Register ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... If the high water mark (defined in control register) is reached or is exceeded the receive FIFO high water flag be- comes active. The flag is set back by reading from the receive FIFO.. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG ...

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... Module and GPIO Interrupt Sources N N Interrupt Interrupt Status Mask Figure 15: Interrupt control circuit ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG N AND Vector N Logic Masked Interrupt Interrupt Vector ...

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... SCI receive full 21 SCI transmit empty 22 GPIO rising 23 GPIO falling 24 I2C wake-up event 25 wake-up timer wake-up event ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Data Sheet 47/71 E909.06 Priority highest lowest QM-No.: 25DS0049E.02 ...

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... List Of All Interrupts for details not active Bit Description 1 - active reset value: 0x0000.0000 Table 44: Interrupt status ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Address 0x00 0x04 0x08 ...

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... Table 47: Maximum interrupt level ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Internal access External access 4:0 : set addressed enable bit in Interrupt Mask register to 0 Bit Description vector number of interrupt to disable Table 50: Interrupt disable ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Internal access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 15:0 : Operand 1 unsigned multiply Bit Description reset value: 0x000 Table 51: MPY ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Address 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C ...

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... Internal access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 15:0 : Operand 2 (write access starts multiplication) Bit Description reset value: 0x0000 Table 55: Operand 2 ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... MPYS: contains the extended sign of the result 0x0000 if result was positive 0xFFFF if result was negative reset value: 0x0000 Table 58: SumExt ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Timer control Timer window config Timer interrupt clear SumLo SumHi SumExt ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG interrupt when watchdog timer reset (reset of timer_counter is not possible) watchdog reset timer_counter to timer_value ...

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... External access 31:0 : timer start value Bit Description reset value: 0xFFFF.FFFF Table 60: Timer counter ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Table 62: Timer window config ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... SC K sample edge T setup MOSI 1st bit MISO 1st bit Figure 17: SPI Bus Timing Diagram ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor hold 2nd bit ...

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... Transmit data / receive data Control Baud config Timeout config Module reset Status Error Interrupt clear ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG rst bit sample sample data data apply ...

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... SSCPH, see SPI mode diagram 0 - 1st edge shift, 2nd edge sample 1 - 1st edge sample, 2nd edge shift 0 : order 0 - LSB first 1 - MSB first Table 65: Control ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Bit Description NOTE: Minimal value for baud divider is 4 reset value: 0x0004 Table 68: Status ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Baud Measurement Results can directly be fed into the baud register to adjust the baud rate (Baud self-synchronization with SYNC byte) ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Register Name Sci baud rate Sci control Sci status Sci data (in/out) Sci measurement control Sci measurement counter ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Address 0x00 0x02 0x04 0x06 ...

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... Note: The 16 bit baud divisor value represents the number of system clock cycles of two bit lengths. The result of a baud measurement(see measurement counter below) can directly be written to the baud rate register. Table 71: Sci baud rate ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Toggling implies clearing the SBK bit before the break character has finished transmitting. As long as SBK is set, the transmitter continues to send complete break characters (10 bits re- spectively 13 bit). reset value: 0x0000 Table 72: Sci control ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... R R 7:0 : sci data register, write for transmitting byte, read received byte Bit Description reset value: 0x0000 Table 74: Sci data (in/out) ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... Table 76: Sci measurement counter ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... External access 7:0 : output data Bit Description reset value: 0x0000 Table 77: Output data ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG sync & irq input data logic output data direction Address ...

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... Reset value Internal access External access 7:0 : clear Bit Description influence 1 - clears related interrupt bit Table 81: Posedge interrupt clear ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... External access 1 port config for details see IO Port Multiplexer Bit Description reset value: 0x0000 Table 85: Port config ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor ...

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... VIN = 750 V for corner pins 6.3 Latch up Test Test Method: 100 mA positive and negative pulses at 85 °C according to AEC-Q100-004. ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ELMOS Semiconductor AG Normal Mode Normal Mode ...

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... Sales and Application Support Office Singapore ELMOS Semiconductor Singapore Pte Ltd. 60 Alexandra Terrace • #09-31 The Comtech • Singapore 118502 © ELMOS Semiconductor AG, 2011. Reproduction, in part or whole, without the prior written consent of ELMOS Semiconductor AG, is prohibited. ELMOS Semiconductor AG Phone: +492317549100 E-Mail: sales@elmos.de ...