MCIMX6S6AVM08AB Freescale Semiconductor, MCIMX6S6AVM08AB Datasheet

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MCIMX6S6AVM08AB

Manufacturer Part Number
MCIMX6S6AVM08AB
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Automotive and Infotainment Processorsr
Datasheet

Specifications of MCIMX6S6AVM08AB

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Instruction / Data Cache Memory
32 KB
Data Ram Size
128 KB
Data Rom Size
96 KB
Operating Supply Voltage
1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
BGA 2240
Interface Type
I2S, SSI, AC97, ESAI, UARTS, eCSPI, I2C, Ethernet, PWM, SJC, GPIO, KPP, SPDIF
Memory Type
DDR3
Minimum Operating Temperature
- 40 C
Number Of Timers
2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX6S6AVM08AB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX6S6AVM08AB
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MCIMX6S6AVM08ABR
Manufacturer:
FSC
Quantity:
200
i.MX 6Solo/6DualLite
Automotive and
Infotainment
Applications Processors
Freescale Semiconductor
Data Sheet: Technical Data
© 2012 Freescale Semiconductor, Inc. All rights reserved.
1
The i.MX 6Solo/6DualLite automotive and infotainment
processors represent Freescale Semiconductor’s latest
achievement in integrated multimedia-focused products
offering high-performance processing with a high degree
of functional integration. These processors are designed
considering the needs of the growing automotive
infotainment, telematics, HMI, and display-based cluster
markets.
The processors feature Freescale’s advanced
implementation of single/dual ARM Cortex™-A9 core,
which operates at speeds of up to 800 MHz. They
include 2D and 3D graphics processors, 1080p video
processing, and integrated power management. Each
processor provides a 32/64-bit
DDR3/LVDDR3/LPDDR2-800 memory interface and a
number of other interfaces for connecting peripherals,
Introduction
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 22
5. Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . 144
6. Package Information and Contact Assignments . . . . . 147
7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 3
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 19
3.2. Recommended Connections for Unused Analog
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 22
4.2. Power Supplies Requirements and Restrictions . 31
4.3. Integrated LDO Voltage Regulator Parameters . . 32
4.4. PLL’s Electrical Characteristics . . . . . . . . . . . . . . 34
4.5. On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . 36
4.6. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . 37
4.7. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . 41
4.8. Output Buffer Impedance Parameters . . . . . . . . . 46
4.9. System Modules Timing . . . . . . . . . . . . . . . . . . . 49
4.10. General-Purpose Media Interface (GPMI) Timing 67
4.11. External Peripheral Interface Parameters . . . . . . 77
5.1. Boot Mode Configuration Pins . . . . . . . . . . . . . . 144
5.2. Boot Device Interface Allocation . . . . . . . . . . . . 146
6.1. 21x21 mm Package Information . . . . . . . . . . . . 147
BGA Case 2240 21 x 21 mm, 0.8 mm pitch
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Document Number: IMX6SDLAEC
Package Information
Ordering Information
See
MCIMX6SxAxxxxxB
MCIMX6UxAxxxxxB
Plastic Package
Table 1 on page 3
Rev. 1, 11/2012

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