MAX6745XKVD3+T Maxim Integrated, MAX6745XKVD3+T Datasheet - Page 17

• Manufacturer Part Number: MAX6745XKVD3+T
• Description: Supervisory Circuits MCU Supervisor
• Manufacturer: Maxim Integrated
• Series: MAX6736, MAX6737, MAX6738, MAX6739, MAX6740, MAX6741, MAX6742, MAX6743, MAX6744, MAX6745r

Specifications of MAX6745XKVD3+T

• Rohs: yes
• Number Of Voltages Monitored: 2
• Monitored Voltage: 1.8 V to 5 V, 0.9 V to 3.3 V
• Undervoltage Threshold: 1.53 V, 0.765 V
• Overvoltage Threshold: 1.62 V, 0.81 V
• Output Type: Active Low, Push-Pull
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 225 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SC-70
• Chip Enable Signals: No
• Maximum Power Dissipation: 247 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 5 uA, 10 uA
• Supply Voltage - Min: 1 V

Figure 5. IR Capture
enabled. The IR module continues to operate in receive
mode until it is stopped by switching into transmit mode
(IRMODE = 1) or clearing IREN = 0.
A special mode reduces the CPU processing burden
when performing IR learning functions. Typically, when
operating in an IR learning capacity, some number of
carrier cycles are examined for frequency determina-
tion. Once the frequency has been determined, the IR
receive function can be reduced to counting the number
of carrier pulses in the burst and the duration of the
combined mark-space time within the burst. To simplify
this process, the receive burst-count mode (as enabled
by the RXBCNT bit) can be used. When RXBCNT = 0,
the standard IR receive capture functionality is in place.
When RXBCNT = 1, the IRV capture operation is dis-
abled and the interrupt flag associated with the capture
no longer denotes a capture. In the carrier burst-count
mode, the IRMT register only counts qualified edges.
The IRIF interrupt flag (normally used to signal a capture
when RXBCNT = 0) now becomes set if two IRCA cycles
elapse without getting a qualified edge. The IRIF inter-
rupt flag thus denotes absence of the carrier and the
beginning of a space in the receive signal. When the
RXBCNT bit is changed from 0 to 1, the IRMT register
is set to 0001h. The IRCFME bit is still used to define
whether the IRV register is counting system IRCLK
clocks or IRCA-defined carrier cycles. The IRXRL bit
defines whether the IRV register is reloaded with 0000h
on detection of a qualified edge (per the IRXSEL[1:0]
bits). Figure 6 and the descriptive sequence embedded
Maxim Integrated
16-Bit Microcontroller with Infrared Module
IRCLK
IRRX PIN
IRCAH + 1
Carrier Burst-Count Mode
CARRIER GENERATION
EDGE DETECT
IRCAL + 1
IRCFME
0
1
in the figure illustrate the expected usage of the receive
burst-count mode.
The microcontroller provides two timers/counters that
support the following functions:
• 16-bit timer/counter
• 16-bit up/down autoreload
• Counter function of external pulse
• 16-bit timer with capture
• 16-bit timer with compare
• Input/output enhancements for pulse-width modulation
• Set/reset/toggle output state on comparator match
• Prescaler with 2n divider (for n = 0, 2, 4, 6, 8, 10)
The device provides a USART peripheral with the follow-
ing features:
• 2-wire interface
• Full-duplex operation for asynchronous data transfers
• Half-duplex operation for synchronous data transfers
• Programmable interrupt when transmit or receive data
• Independent programmable baud-rate generator
• Optional 9th bit parity support
• Start/stop bit support
operation completes
CARRIER MODULATION
RESET IRV TO 0000h
COPY IRV TO IRMT
0000h
ON EDGE DETECT
IRV
IR TIMER OVERFLOW
IR INTERRUPT
16-Bit Timers/Counters
IRXRL
MAXQ613
INTERRUPT TO CPU
IRDATA
USART
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