IS42S16400F-6TL ISSI, Integrated Silicon Solution Inc, IS42S16400F-6TL Datasheet - Page 16

IC SDRAM 64MBIT 166MHZ 54TSOP

IS42S16400F-6TL

Manufacturer Part Number
IS42S16400F-6TL
Description
IC SDRAM 64MBIT 166MHZ 54TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheets

Specifications of IS42S16400F-6TL

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (4M x 16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
4Mx16
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
130mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Data Bus Width
16 bit
Maximum Clock Frequency
166 MHz
Access Time
6 ns, 5.4 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
130 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1075
IS42S16400F-6TL

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IS42S16400F
IC42S16400F
REGISTER DEFINITION
Mode Register
The mode register is used to define the specific mode
of operation of the SDRAM. This definition includes the
selection of a burst length, a burst type, a CAS latency,
an operating mode and a write burst mode, as shown in
MODE REGISTER DEFINITION.
The mode register is programmed via the LOAD MODE
REGISTER command and will retain the stored information
until it is programmed again or the device loses power.
16
MODE REGISTER DEFINITION
A11
Reserved
A10
Write Burst Mode
(1)
M9
0
1
A9
Mode
Programmed Burst Length
Single Location Access
Operating Mode
A8
M8 M7
— —
0
0
A7
Defined
M6-M0
Latency Mode
A6
M6 M5 M4
0
0
0
0
1
1
1
1
Mode
Standard Operation
All Other States Reserved
0
0
1
1
0
0
1
1
A5
0
1
0
1
0
1
0
1
A4
Burst Type
Mode register bits M0-M2 specify the burst length, M3
specifies the type of burst (sequential or interleaved), M4- M6
specify the CAS latency, M7 and M8 specify the operating
mode, M9 specifies the WRITE burst mode, and M10 and
M11 are reserved for future use.
The mode register must be loaded when all banks are
idle, and the controller must wait the specified time before
initiating the subsequent operation.Violating either of these
requirements will result in unspecified operation.
CAS Latency
M3
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
A3
Integrated Silicon Solution, Inc. — www.issi.com
2
3
Interleaved
Sequential
1. To ensure compatibility with future devices,
A2
Burst Length
Type
should program M11, M10 = "0, 0"
M2
0
0
0
0
1
1
1
1
A1
M1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
A0
Reserved
Reserved
Reserved
Address Bus
Mode Register (Mx)
Full Page
M3=0
1
2
4
8
Reserved
Reserved
Reserved
Reserved
M3=1
1
2
4
8
03/19/08
Rev. A

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