C8051F510-IMR Silicon Labs, C8051F510-IMR Datasheet - Page 46
C8051F510-IMR
Manufacturer Part Number
C8051F510-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 32 kB 4 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F510-IMR.pdf
(312 pages)
Specifications of C8051F510-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F50x/F51x
Table 5.4. Reset Electrical Characteristics
–40 to +125 °C unless otherwise specified.
Table 5.5. Flash Electrical Characteristics
V
46
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
V
V
Missing Clock Detector Timeout
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Flash Size
Endurance
Flash Retention
Erase Cycle Time
Write Cycle Time
V
DD
DD
DD
DD
DD
DD
1. On the 64K Flash devices, 1024 bytes at addresses 0xFC00 to 0xFFFF are reserved.
2. See Table 5.4 for the
= 1.8 to 2.75 V, –40 to +125 °C unless otherwise specified.
RST Threshold (V
RST Threshold (V
Monitor Turn-on Time
Monitor Supply Current
Parameter
Parameter
RST-LOW
RST-HIGH
C8051F500/1/2/3/8/9
C8051F504/5/6/7-F510/1
85 °C
25 MHz System Clock
25 MHz System Clock
Write / Erase operations
V
RST-HIGH
)
)
Conditions
VIO = 5 V; IOL = 70 µA
RST = 0.0 V, VIO = 5 V
Time from last system clock
rising edge to reset initiation
VDD = 2.1V
VDD = 2.5V
Delay between release of
any reset source and code
execution at location 0x0000
specification.
Conditions
Rev. 1.2
V
RST-HIGH
20 k
Min
79
10
28
2
65536
32768
0.7 x V
1.65
2.25
150 k
Min
200
200
Typ
—
—
—
—
—
—
6
30
84
—
—
*
IO
1.75
2.30
Typ
370
270
130
Max
125
47
60
—
—
—
—
1
—
—
45
—
0.3 x V
Max
1.80
2.45
115
600
600
160
100
40
—
—
Erase/Write
2
Units
Bytes
Years
IO
ms
µs
V
Units
mV
µA
µA
µs
µs
µs
µs
V
V
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