Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 160

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
0.032768 (32 KHz)
START
System Clock
Frequency
(MHz)
OCD Data Format
OCD Autobaud Detector/Generator
20.0
1.0
•
•
•
The OCD interface uses the asynchronous data format defined for RS-232. Each character
is transmitted as 1 start bit, 8 data bits (least-significant bit first) and 1 stop bit. See
Figure 23.
To run over a range of baud rates (data bits per second) with various system clock frequen-
cies, the On-Chip Debugger contains an autobaud detector/generator. After a reset, the
OCD is idle until it receives data. The OCD requires that the first character sent from the
host is the character
plus 7 data bits), framed between high bits. The autobaud detector measures this period
and sets the OCD baud rate generator accordingly.
The autobaud detector/generator is clocked by the system clock. The minimum baud rate
is the system clock frequency divided by 512. For optimal operation with asynchronous
datastreams, the maximum recommended baud rate is the system clock frequency divided
by 8. The maximum possible baud rate for asynchronous datastreams is the system clock
frequency divided by 4, but this theoretical maximum is possible only for low noise
designs with clean signals. Table 94 lists minimum and recommended maximum baud
rates for sample crystal frequencies.
D0
Watchdog Timer reset
Asserting the RESET pin Low to initiate a reset
Driving the DBG pin Low while the device is in STOP Mode initiates a system reset
D1
Maximum Baud Rate
Recommended
Table 94. OCD Baud-Rate Limits
2500.0
(kbps)
80H
125.0
4.096
D2
Figure 23. OCD Data Format
. The character
D3
Standard PC Baud Rate
80H
D4
Recommended
has eight continuous bits low (one Start bit
1,843,200
115,200
(bps)
2400
D5
Z8 Encore!
D6
Product Specification
Minimum Baud Rate
D7
®
(kbps)
0.064
1.95
F0830 Series
39
STOP
Operation
142