Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 95

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
PWM Output High Time Ratio (%)
If
by:
PWM Output High Time Ratio (%)
CAPTURE Mode
In CAPTURE Mode, the current timer count value is recorded when the appropriate exter-
nal timer input transition occurs. The capture count value is written to the timer PWM
High and Low Byte registers. The timer input is the system clock. The TPOL bit in the
Timer Control Register determines if the capture occurs on a rising edge or a falling edge
of the timer input signal.
When the capture event occurs, an interrupt is generated and the timer continues counting.
The INPCAP bit in the TxCTL1 Register is set to indicate the timer interrupt because of an
input capture event.
The timer continues counting up to the 16-bit reload value stored in the Timer Reload
High and Low Byte registers. Upon reaching the reload value, the timer generates an inter-
rupt and continues counting. The INPCAP bit in the TxCTL1 Register clears, indicating
that the timer interrupt has not occurred because of an input capture event.
Observe the following steps for configuring a timer for CAPTURE Mode and initiating
the count:
1. Write to the Timer Control Register to:
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
3. Write to the Timer Reload High and Low Byte registers to set the reload value.
4. Clear the timer PWM High and Low Byte registers to
TPOL
–
–
–
–
cally
allows user software to determine if interrupts were generated either by a capture
event or by a reload. If the PWM High and Low Byte registers still contain
after the interrupt, the interrupt were generated by a reload.
Disable the timer
Configure the timer for CAPTURE Mode
Set the prescale value
Set the capture edge (rising or falling) for the timer input
is set to 1, the ratio of the PWM output high time to the total period is represented
0001H
).
=
=
Reload Value PWM Value
-------------------------------------------------------------------- -
--------------------------------
Reload Value
PWM Value
Reload Value
–

100
0000H
Z8 Encore!
Product Specification
. Clearing these registers

100
®
F0830 Series
0000H
Operation
77