ZLF645S2864GP0001 Maxim Integrated, ZLF645S2864GP0001 Datasheet - Page 135
ZLF645S2864GP0001
Manufacturer Part Number
ZLF645S2864GP0001
Description
8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
Manufacturer
Maxim Integrated
Datasheet
1.ZLF645E0H4864G2204.pdf
(201 pages)
Specifications of ZLF645S2864GP0001
Core
Z8
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
64 KB
Data Ram Size
1 KB
Operating Supply Voltage
2 V to 3.6 V
Interface Type
UART
Number Of Programmable I/os
5
Number Of Timers
2 x 8 bit, 1 x 16 bit
Processor Series
ZLF645
Program Memory Type
Flash
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Interrupts
19-4572; Rev 0; 4/09
Table 60. Interrupt Control Registers
12-Bit
0F9
0FA
0FB
Address (Hex)
Bank
All
All
All
The ZLF645 MCU features six interrupts (see
maskable and prioritized (see
The six interrupt sources are divided as follows:
•
•
•
P32 and UART receiver share the same interrupt. Only one interrupt can be selected as a
source. When the UART receiver is enabled, P32 is no longer used as an interrupt source.
The UART transmit interrupt and UART baud rate interrupt use the same interrupt as the
P33 interrupt. The user selects which source triggers the interrupt. When bit 7 of UCTL is
1, the UART transmit interrupt is the source. When bit 7 of UCTL is 0 and bit 5 of UCTL
is 1, the BRG interrupt is selected. The
enables or disables the six interrupt requests. The source for IRQ1 is determined by bit 1
of the Port 3 Mode register (P3M) and bit 4 of the SMR4 register.
If P3M[1]=0 (DIGITAL mode) and SMR4[4]=0, pin P33 is the IRQ1 source.
If P3M[1]=1 (ANALOG mode) or SMR4[4]=1 (SMR interrupt enabled), the output of the
Stop Mode Recovery source logic is used as the source for the interrupt. For more details,
see
Stop Mode Recovery Interrupt
Three sources are claimed by Port 3 lines P33:P31
Two by the counter/timers (see
One for low-voltage detection
8-Bit
F9
FA
FB
Register Description
Interrupt Priority Register
Interrupt Request Register
Interrupt Mask Register
Figure 40
on page 144.
Table
Interrupt Mask Register
on page 128).
61)
Table 61
Mnemonic
IPR
IRQ
IMR
on page 129). These interrupts are
ZLF645 Series Flash MCUs
Reset
XXh
00h
0XXX_XXXXb
Product Specification
(globally or individually)
Page No
Interrupts
130
131
133
127
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